[{"data":1,"prerenderedAt":59},["ShallowReactive",2],{"blog-stack-balance-hf-pcb-cn":3},{"title":4,"description":5,"date":6,"lastUpdated":6,"category":7,"image":8,"readingTime":9,"wordCount":10,"timeRequired":11,"htmlContent":12,"faq":13,"tags":26,"slug":33,"sourceLocale":34,"jsonld":35},"Stack Balance in HF PCB: Achieving Symmetric and Stable Construction","Complete guide to stack balance in high frequency PCBs covering symmetric construction, copper balance, material matching, and warpage prevention for reliable HF manufacturing.","2025-12-20","design","/assets/img/blogs/2025/12/stack-balance-hf-pcb.webp",9,1615,"PT9M","\u003Cp>Balanced stackup construction prevents warpage and ensures consistent electrical performance in high frequency PCBs. An unbalanced stackup can twist, bow, or cup during manufacturing and thermal cycling, creating assembly problems and potentially affecting impedance. For HF designs where precise geometry determines signal integrity, stack balance is not optional—it&#39;s a fundamental requirement.\u003C/p>\n\u003Cp>This guide provides practical knowledge for designing balanced stackups that remain flat and stable throughout manufacturing and product life.\u003C/p>\n\u003Cp>HILPCB manufactures high frequency PCBs with balanced construction verified through our lamination process, achieving flatness specifications suitable for demanding assembly requirements.\u003C/p>\n\u003Ch2>Why Stack Balance Matters\u003C/h2>\n\u003Cp>Unbalanced stackups create internal stress during manufacturing that manifests as board warpage. This warpage affects both manufacturing and long-term reliability.\u003C/p>\n\u003Cp>At HILPCB, our engineering team reviews stackup balance as part of standard DFM analysis, recommending adjustments to achieve flat, stable boards.\u003C/p>\n\u003Cp>\u003Cstrong>Manufacturing Temperature Cycling\u003C/strong>\u003C/p>\n\u003Cp>During lamination, the board heats to cure prepreg materials (typically 180°C or higher). Different materials expand differently with temperature. When the board cools, unbalanced construction creates internal stress as materials try to contract to different extents. This stress causes the board to warp.\u003C/p>\n\u003Cp>\u003Cstrong>Assembly Challenges\u003C/strong>\u003C/p>\n\u003Cp>Warped boards create assembly problems:\u003C/p>\n\u003Cul>\n\u003Cli>Components don&#39;t sit flat on pads\u003C/li>\n\u003Cli>Solder paste doesn&#39;t distribute evenly\u003C/li>\n\u003Cli>BGA connections may not form properly\u003C/li>\n\u003Cli>Pick-and-place accuracy degrades\u003C/li>\n\u003Cli>Reflow can worsen warpage\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Long-Term Reliability\u003C/strong>\u003C/p>\n\u003Cp>Internal stress from unbalanced construction can:\u003C/p>\n\u003Cul>\n\u003Cli>Cause delayed warpage over time\u003C/li>\n\u003Cli>Create via barrel stress\u003C/li>\n\u003Cli>Affect solder joint reliability\u003C/li>\n\u003Cli>Change impedance with temperature cycling\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>High Frequency Specific Concerns\u003C/strong>\u003C/p>\n\u003Cp>HF designs are particularly sensitive:\u003C/p>\n\u003Cul>\n\u003Cli>Dielectric thickness changes affect impedance\u003C/li>\n\u003Cli>Via connections may stress\u003C/li>\n\u003Cli>Differential pairs may become unbalanced\u003C/li>\n\u003Cli>Connector interfaces may deform\u003C/li>\n\u003C/ul>\n\u003Ch2>Symmetric Layer Structure Design\u003C/h2>\n\u003Cp>Symmetry around the board centerline is the primary strategy for achieving balanced construction. A perfectly symmetric stackup experiences equal forces on both sides during thermal cycling.\u003C/p>\n\u003Cp>HILPCB supports both symmetric and asymmetric constructions, with clear communication about expected flatness for each approach.\u003C/p>\n\u003Cp>\u003Cstrong>Mirror Image Construction\u003C/strong>\u003C/p>\n\u003Cp>The ideal balanced stackup mirrors exactly around the center:\u003C/p>\n\u003Cul>\n\u003Cli>Same material types above and below center\u003C/li>\n\u003Cli>Same dielectric thicknesses\u003C/li>\n\u003Cli>Same copper weights\u003C/li>\n\u003Cli>Same layer functions (plane vs. signal)\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Example 8-Layer Symmetric Stackup\u003C/strong>\u003C/p>\n\u003Cp>Layer 1: 1 oz copper (signal)\nPrepreg: 4 mil FR-4\nLayer 2: 1 oz copper (ground plane)\nCore: 8 mil FR-4\nLayer 3: 0.5 oz copper (signal)\nPrepreg: 4 mil FR-4\n---CENTER---\nPrepreg: 4 mil FR-4\nLayer 4: 0.5 oz copper (signal)\nCore: 8 mil FR-4\nLayer 5: 1 oz copper (power plane)\nPrepreg: 4 mil FR-4\nLayer 6: 1 oz copper (signal)\u003C/p>\n\u003Cdiv style=\"background: linear-gradient(135deg, #1e3a5f 0%, #2d5a87 100%); border-radius: 20px; padding: 32px 24px; margin: 32px 0; box-shadow: 0 12px 32px rgba(0,0,0,0.3);\">\n\u003Ch3 style=\"color: #e0f2fe; font-size: 17px; font-weight: 700; margin: 0 0 24px 0; text-align: center;\">Stack Balance Checklist\u003C/h3>\n\u003Cdiv style=\"display: grid; grid-template-columns: repeat(2, 1fr); gap: 16px;\">\n\u003Cdiv style=\"background: rgba(255,255,255,0.1); border-radius: 10px; padding: 20px 14px; text-align: center;\">\n\u003Cdiv style=\"font-size: 22px; font-weight: 800; color: #7dd3fc;\">Materials\u003C/div>\n\u003Cdiv style=\"font-size: 12px; color: #bae6fd; margin-top: 6px;\">Same types, mirrored position\u003C/div>\n\u003C/div>\n\u003Cdiv style=\"background: rgba(255,255,255,0.1); border-radius: 10px; padding: 20px 14px; text-align: center;\">\n\u003Cdiv style=\"font-size: 22px; font-weight: 800; color: #7dd3fc;\">Thickness\u003C/div>\n\u003Cdiv style=\"font-size: 12px; color: #bae6fd; margin-top: 6px;\">Equal dielectric top and bottom\u003C/div>\n\u003C/div>\n\u003Cdiv style=\"background: rgba(255,255,255,0.1); border-radius: 10px; padding: 20px 14px; text-align: center;\">\n\u003Cdiv style=\"font-size: 22px; font-weight: 800; color: #7dd3fc;\">Copper\u003C/div>\n\u003Cdiv style=\"font-size: 12px; color: #bae6fd; margin-top: 6px;\">Balanced weights and coverage\u003C/div>\n\u003C/div>\n\u003Cdiv style=\"background: rgba(255,255,255,0.1); border-radius: 10px; padding: 20px 14px; text-align: center;\">\n\u003Cdiv style=\"font-size: 22px; font-weight: 800; color: #7dd3fc;\">Function\u003C/div>\n\u003Cdiv style=\"font-size: 12px; color: #bae6fd; margin-top: 6px;\">Plane vs signal mirrored\u003C/div>\n\u003C/div>\n\u003C/div>\n\u003C/div>\n\n\u003Cp>\u003Cstrong>Hybrid Material Symmetry\u003C/strong>\u003C/p>\n\u003Cp>When using different materials (FR-4 with Rogers, for example), maintain symmetry:\u003C/p>\n\u003Cul>\n\u003Cli>If using Rogers on one signal layer, use it on the mirrored layer\u003C/li>\n\u003Cli>Match CTE (coefficient of thermal expansion) across centerline\u003C/li>\n\u003Cli>Consider material stiffness differences\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Odd Layer Count Considerations\u003C/strong>\u003C/p>\n\u003Cp>Odd layer counts are inherently asymmetric but can be balanced:\u003C/p>\n\u003Cul>\n\u003Cli>Center layer acts as symmetry axis\u003C/li>\n\u003Cli>Layers above and below should mirror\u003C/li>\n\u003Cli>Center layer material choice affects overall balance\u003C/li>\n\u003C/ul>\n\u003Ch2>Copper Balance Strategies\u003C/h2>\n\u003Cp>Even with symmetric layer arrangement, uneven copper distribution causes warpage. Copper and dielectric have different CTEs—areas with more copper behave differently than areas with less.\u003C/p>\n\u003Cp>HILPCB provides copper balance analysis and can recommend fill patterns to achieve better balance.\u003C/p>\n\u003Cp>\u003Cstrong>Copper Coverage Assessment\u003C/strong>\u003C/p>\n\u003Cp>Evaluate copper coverage on each layer:\u003C/p>\n\u003Cul>\n\u003Cli>Large ground/power planes: ~90%+ coverage\u003C/li>\n\u003Cli>Dense signal routing: ~50-70% coverage\u003C/li>\n\u003Cli>Sparse routing: ~20-40% coverage\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Top-to-Bottom Balance\u003C/strong>\u003C/p>\n\u003Cp>Compare total copper on top half vs. bottom half:\u003C/p>\n\u003Cul>\n\u003Cli>Sum copper weight × coverage for each layer\u003C/li>\n\u003Cli>Compare top half total vs. bottom half total\u003C/li>\n\u003Cli>Imbalance creates bowing (concave toward light copper side)\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Left-to-Right and Area Balance\u003C/strong>\u003C/p>\n\u003Cp>Uneven distribution across the board area causes twisting:\u003C/p>\n\u003Cul>\n\u003Cli>Concentrated copper in one area vs. distributed\u003C/li>\n\u003Cli>Different routing density in different board regions\u003C/li>\n\u003Cli>Component placement affecting local copper density\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Copper Fill for Balance\u003C/strong>\u003C/p>\n\u003Cp>Add copper fill to sparse areas:\u003C/p>\n\u003Cul>\n\u003Cli>Thief copper in open areas\u003C/li>\n\u003Cli>Cross-hatched ground fill\u003C/li>\n\u003Cli>Fill connected to ground or floating (with via connections)\u003C/li>\n\u003Cli>Match fill patterns on mirrored layers\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Copper Fill Guidelines\u003C/strong>\u003C/p>\n\u003Cul>\n\u003Cli>Maintain minimum spacing from signals (crosstalk consideration)\u003C/li>\n\u003Cli>Connect fill to ground with adequate vias\u003C/li>\n\u003Cli>Use consistent fill pattern on balanced layers\u003C/li>\n\u003Cli>Avoid fill islands (unconnected copper)\u003C/li>\n\u003C/ul>\n\u003Ch2>Material Matching and CTE Considerations\u003C/h2>\n\u003Cp>Different materials expand at different rates with temperature. Matching materials or understanding CTE differences enables balanced construction.\u003C/p>\n\u003Cp>HILPCB maintains material specifications including CTE data for proper stackup engineering.\u003C/p>\n\u003Cp>\u003Cstrong>CTE Basics\u003C/strong>\u003C/p>\n\u003Cp>Coefficient of thermal expansion (CTE) measures dimensional change with temperature:\u003C/p>\n\u003Cul>\n\u003Cli>FR-4 x-y CTE: ~12-16 ppm/°C\u003C/li>\n\u003Cli>Rogers 4350B x-y CTE: ~11-14 ppm/°C\u003C/li>\n\u003Cli>Copper CTE: ~17 ppm/°C\u003C/li>\n\u003Cli>Z-axis CTE varies more (affects via stress)\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Material Matching Strategy\u003C/strong>\u003C/p>\n\u003Cp>For best balance:\u003C/p>\n\u003Cul>\n\u003Cli>Use same material family throughout when possible\u003C/li>\n\u003Cli>If mixing materials, maintain symmetry around center\u003C/li>\n\u003Cli>Consider CTE compatibility for hybrid stackups\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Hybrid Stackup Balance\u003C/strong>\u003C/p>\n\u003Cp>When combining materials (HF core with FR-4):\u003C/p>\n\u003Cul>\n\u003Cli>Place HF materials symmetrically\u003C/li>\n\u003Cli>Match HF material thickness above and below center\u003C/li>\n\u003Cli>FR-4 sections should also be symmetric\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Prepreg vs. Core Considerations\u003C/strong>\u003C/p>\n\u003Cp>Cores are pre-cured; prepreg cures during lamination:\u003C/p>\n\u003Cul>\n\u003Cli>Core dimensions are stable and predictable\u003C/li>\n\u003Cli>Prepreg flows during lamination, thickness varies\u003C/li>\n\u003Cli>Balance prepreg positions above and below center\u003C/li>\n\u003Cli>Consider resin content differences\u003C/li>\n\u003C/ul>\n\u003Ch2>Warpage Specifications and Measurement\u003C/h2>\n\u003Cp>Understanding warpage specifications helps ensure designs meet assembly requirements.\u003C/p>\n\u003Cp>HILPCB provides warpage measurements and certifies boards meet specified flatness requirements.\u003C/p>\n\u003Cp>\u003Cstrong>Industry Standards\u003C/strong>\u003C/p>\n\u003Cp>IPC-6012 defines warpage limits:\u003C/p>\n\u003Cul>\n\u003Cli>Standard: 0.75% (7.5 mils per inch)\u003C/li>\n\u003Cli>Assembly-critical: 0.5% or less\u003C/li>\n\u003Cli>BGA assembly: May require 0.5% or tighter\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Measurement Methods\u003C/strong>\u003C/p>\n\u003Cp>Warpage is measured as maximum deviation from flat:\u003C/p>\n\u003Cul>\n\u003Cli>Place board on flat surface\u003C/li>\n\u003Cli>Measure gap at highest/lowest points\u003C/li>\n\u003Cli>Calculate as percentage of diagonal dimension\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Factors Affecting Measurement\u003C/strong>\u003C/p>\n\u003Cp>Warpage can change with:\u003C/p>\n\u003Cul>\n\u003Cli>Temperature (measure at assembly temperature)\u003C/li>\n\u003Cli>Humidity (moisture absorption affects dimensions)\u003C/li>\n\u003Cli>Time (stress relaxation over time)\u003C/li>\n\u003Cli>Handling (mechanical stress)\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Design for Flatness\u003C/strong>\u003C/p>\n\u003Cp>Beyond balanced stackup:\u003C/p>\n\u003Cul>\n\u003Cli>Consider panelization effects\u003C/li>\n\u003Cli>Account for assembly thermal profile\u003C/li>\n\u003Cli>Allow for some relaxation after fabrication\u003C/li>\n\u003Cli>Specify critical areas that must be flat\u003C/li>\n\u003C/ul>\n\u003Ch2>Managing Unavoidable Asymmetry\u003C/h2>\n\u003Cp>Some designs have constraints that prevent perfect symmetry. Understanding the tradeoffs enables informed decisions.\u003C/p>\n\u003Cp>HILPCB engineering can advise on expected warpage for asymmetric constructions and mitigation strategies.\u003C/p>\n\u003Cp>\u003Cstrong>When Asymmetry Is Necessary\u003C/strong>\u003C/p>\n\u003Cp>Legitimate reasons for asymmetric stackup:\u003C/p>\n\u003Cul>\n\u003Cli>Specific impedance requirements\u003C/li>\n\u003Cli>Layer count optimization (cost constraint)\u003C/li>\n\u003Cli>Component placement constraints\u003C/li>\n\u003Cli>Special material requirements on one side\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Mitigation Strategies\u003C/strong>\u003C/p>\n\u003Cp>Reduce impact of necessary asymmetry:\u003C/p>\n\u003Cul>\n\u003Cli>Minimize asymmetry (match as closely as possible)\u003C/li>\n\u003Cli>Use copper fill to balance copper distribution\u003C/li>\n\u003Cli>Choose materials with similar CTE\u003C/li>\n\u003Cli>Consider panel design to constrain warpage\u003C/li>\n\u003Cli>Specify warpage limits and verify compliance\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Acceptable Asymmetry Levels\u003C/strong>\u003C/p>\n\u003Cp>Minor asymmetry may be acceptable:\u003C/p>\n\u003Cul>\n\u003Cli>Small dielectric thickness differences (±10%)\u003C/li>\n\u003Cli>Small copper weight differences\u003C/li>\n\u003Cli>Asymmetric fill patterns with matching total coverage\u003C/li>\n\u003C/ul>\n\u003Cp>Larger asymmetry requires warpage analysis and may need specification adjustment.\u003C/p>\n\u003Cp>\u003Cstrong>Communication with Fabricator\u003C/strong>\u003C/p>\n\u003Cp>For asymmetric designs:\u003C/p>\n\u003Cul>\n\u003Cli>Indicate expected warpage tolerance\u003C/li>\n\u003Cli>Identify critical flat areas\u003C/li>\n\u003Cli>Discuss panel design options\u003C/li>\n\u003Cli>Consider post-fab flattening if needed\u003C/li>\n\u003C/ul>\n\u003Chr>\n\u003Ch2>Related Layer Structure Topics\u003C/h2>\n\u003Cul>\n\u003Cli>\u003Cstrong>\u003Ca href=\"/cn/blog/high-frequency-pcb-layer-structure/\">High Frequency PCB Layer Structure\u003C/a>:\u003C/strong> Complete stackup design guide\u003C/li>\n\u003Cli>\u003Cstrong>\u003Ca href=\"/cn/blog/layer-arrangement-hf-pcb/\">Layer Arrangement in HF PCB\u003C/a>:\u003C/strong> Signal and plane ordering strategies\u003C/li>\n\u003Cli>\u003Cstrong>\u003Ca href=\"/cn/blog/ground-plane-design-hf-pcb/\">Ground Plane Design for HF PCB\u003C/a>:\u003C/strong> Ground plane optimization techniques\u003C/li>\n\u003Cli>\u003Cstrong>\u003Ca href=\"/cn/blog/power-plane-design-hf-pcb/\">Power Plane Design for HF PCB\u003C/a>:\u003C/strong> Power distribution in HF designs\u003C/li>\n\u003Cli>\u003Cstrong>\u003Ca href=\"/cn/blog/layer-coupling-high-frequency-pcb/\">Layer Coupling in High Frequency PCB\u003C/a>:\u003C/strong> Managing interlayer coupling\u003C/li>\n\u003C/ul>\n\u003Cdiv data-component=\"BlogQuickQuoteInline\">\u003C/div>\n\n\u003Chr>\n\u003Ch2>HILPCB Stack Balance Services\u003C/h2>\n\u003Cp>HILPCB delivers balanced construction for demanding high frequency applications:\u003C/p>\n\u003Cp>\u003Cstrong>Stackup Review:\u003C/strong> Engineering assessment of proposed stackup balance with recommendations for improvement.\u003C/p>\n\u003Cp>\u003Cstrong>Copper Analysis:\u003C/strong> Evaluation of copper distribution with fill pattern recommendations for optimal balance.\u003C/p>\n\u003Cp>\u003Cstrong>Process Control:\u003C/strong> Controlled lamination processes that maintain stackup integrity through manufacturing.\u003C/p>\n\u003Cp>\u003Cstrong>Verification:\u003C/strong> Warpage measurement and certification to specified flatness requirements.\u003C/p>\n\u003Cp>From \u003Ca href=\"/cn/products/small-batch-assembly/\">prototypes\u003C/a> through \u003Ca href=\"/cn/products/large-volume-assembly/\">production\u003C/a>, HILPCB provides flat, stable boards for high frequency applications with demanding assembly requirements.\u003C/p>\n\u003Cp>Contact HILPCB for stack balance review and manufacturing quotation.\u003C/p>\n\u003Ch2>Common Questions\u003C/h2>\n\u003C!-- faq:start -->\n\n\u003Ch3>What does stack balance mean in a high frequency PCB?\u003C/h3>\n\u003Cp>It means the stackup is constructed symmetrically enough in copper, dielectric, and layer distribution to prevent distortion during fabrication and assembly.\u003C/p>\n\u003Ch3>Why does stack balance matter for warpage control?\u003C/h3>\n\u003Cp>Balanced structures distribute stress more evenly, which reduces bow, twist, and reflow-related warpage.\u003C/p>\n\u003Ch3>Can stack balance also affect electrical performance?\u003C/h3>\n\u003Cp>Yes. An unbalanced stack can shift layer spacing and reference conditions, indirectly affecting impedance consistency and repeatability.\u003C/p>\n\u003Ch3>How is stack balance achieved?\u003C/h3>\n\u003Cp>Designers and fabricators coordinate copper distribution, material symmetry, prepreg placement, and stackup planning before release.\u003C/p>\n\u003C!-- faq:end -->\n\u003Csection class=\"related-links\" aria-label=\"Related\">\u003Ch3>Related links\u003C/h3>\u003Cul>\u003Cli>\u003Ca href=\"/cn/blog/high-frequency-pcb-layer-structure/\">高频PCB叠层设计指南\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/cn/blog/layer-arrangement-hf-pcb/\">Layer Arrangement in HF PCB: Signal and Plane Ordering Strategies\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/cn/blog/ground-plane-design-hf-pcb/\">HF PCB Ground Plane Design: Return-Path Guide\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/cn/blog/power-plane-design-hf-pcb/\">Power Plane Design for HF PCB: Distribution and Decoupling Strategies\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/cn/blog/layer-coupling-high-frequency-pcb/\">Layer Coupling in High Frequency PCB: Managing Interlayer Electromagnetic Interaction\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/cn/products/small-batch-assembly/\">prototypes\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/cn/products/large-volume-assembly/\">production\u003C/a>\u003C/li>\u003C/ul>\u003C/section>",[14,17,20,23],{"question":15,"answer":16,"answerText":16},"What does stack balance mean in a high frequency PCB?","It means the stackup is constructed symmetrically enough in copper, dielectric, and layer distribution to prevent distortion during fabrication and assembly.",{"question":18,"answer":19,"answerText":19},"Why does stack balance matter for warpage control?","Balanced structures distribute stress more evenly, which reduces bow, twist, and reflow-related warpage.",{"question":21,"answer":22,"answerText":22},"Can stack balance also affect electrical performance?","Yes. An unbalanced stack can shift layer spacing and reference conditions, indirectly affecting impedance consistency and repeatability.",{"question":24,"answer":25,"answerText":25},"How is stack balance achieved?","Designers and fabricators coordinate copper distribution, material symmetry, prepreg placement, and stackup planning before release.",[27,28,29,30,31,32],"Stack Balance","High Frequency PCB","PCB Symmetry","Warpage Control","Copper Balance","PCB Manufacturing","stack-balance-hf-pcb","en",{"blog":36,"breadcrumb":45},{"@context":37,"@type":38,"headline":4,"description":5,"image":8,"url":39,"datePublished":6,"dateModified":6,"timeRequired":11,"keywords":40,"articleSection":7,"author":41,"publisher":44},"https://schema.org","BlogPosting","https://hilpcb.com/cn/blog/stack-balance-hf-pcb/","Stack Balance, High Frequency PCB, PCB Symmetry, Warpage Control, Copper Balance, PCB Manufacturing",{"@type":42,"name":43},"Organization","HILPCB",{"@type":42,"name":43},{"@context":37,"@type":46,"itemListElement":47},"BreadcrumbList",[48,53,57],{"@type":49,"position":50,"name":51,"item":52},"ListItem",1,"Home","https://hilpcb.com/",{"@type":49,"position":54,"name":55,"item":56},2,"Blog","https://hilpcb.com/cn/blog/",{"@type":49,"position":58,"name":33,"item":39},3,1791623285168]