[{"data":1,"prerenderedAt":66},["ShallowReactive",2],{"blog-active-passive-analog-filter-selection-en":3},{"title":4,"description":5,"date":6,"lastUpdated":6,"category":7,"image":8,"readingTime":9,"wordCount":10,"timeRequired":11,"htmlContent":12,"faq":13,"tags":30,"slug":34,"sourceLocale":35,"availableLocales":36,"jsonld":42},"Active vs. Passive Analog Filters: PCB Selection","Compare active and passive analog filters against the same signal, source and load requirements, then carry the decision into PCB assembly and test planning.","2026-11-12","design","/assets/blogs/active-passive-analog-filter-selection/subwoofer-amplifier-board.webp",12,2330,"PT12M","\u003Cp>\u003Cstrong>Choose the candidate that meets the same written signal-chain requirements with acceptable margin and verifiable evidence—not the one that looks simpler in isolation.\u003C/strong> A passive network may be attractive when its insertion loss and loading are acceptable and no powered stage is needed. An active network may be attractive when gain, isolation, or a particular response is needed, provided the amplifier works within its supply, headroom, noise, and stability limits.\u003C/p>\n\u003Cp>Neither label establishes a winner. Write the requirements at the interfaces, evaluate both candidates against them, and leave unresolved items marked \u003Cstrong>not yet verified\u003C/strong>. If neither candidate passes, revise the requirements or the design rather than selecting the less-bad result.\u003C/p>\n\u003Cp>Power-line EMI and safety filtering, as well as detailed sensor-to-ADC conditioning, require separate analysis. For RF filter measurement and test, see \u003Ca href=\"/en/blog/spectrum-filter-test-measurement/\">spectrum filter test and measurement\u003C/a>.\u003C/p>\n\u003Cp>\u003Cimg src=\"/assets/blogs/active-passive-analog-filter-selection/subwoofer-amplifier-board.webp\" alt=\"A subwoofer amplifier module with a low-pass front end\">\u003C/p>\n\u003Cp>\u003Cem>This separate audio amplifier module is an example of a board with a low-pass front end; it is not the hypothetical circuit calculated below.\u003C/em>\u003C/p>\n\u003Ch2>Define the response before choosing the circuit\u003C/h2>\n\u003Cp>Start with what the signal chain must do:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cstrong>Wanted frequencies:\u003C/strong> define the passband and allowable gain error, ripple, and phase error at specified reference planes.\u003C/li>\n\u003Cli>\u003Cstrong>Rejected frequencies:\u003C/strong> define the stopband and minimum attenuation, including any important interfering tones.\u003C/li>\n\u003Cli>\u003Cstrong>Transition region:\u003C/strong> state where the response may change between those limits.\u003C/li>\n\u003Cli>\u003Cstrong>Timing needs:\u003C/strong> specify phase, group delay, or waveform-settling limits where they matter.\u003C/li>\n\u003Cli>\u003Cstrong>Operating conditions:\u003C/strong> include source and load impedance, signal swing, supply range, temperature, tolerances, noise, power, and area.\u003C/li>\n\u003C/ul>\n\u003Cp>A \u003Cstrong>response family\u003C/strong> describes the shape of the desired transfer function. For example, a Butterworth response favors a flat magnitude in its passband; other families make different trade-offs among ripple, transition sharpness, and phase behavior. \u003Cstrong>Order\u003C/strong> describes the number of poles in the idealized transfer function and influences the achievable roll-off.\u003C/p>\n\u003Cp>Neither term specifies how the filter is built. An RC network, an RLC network, and an amplifier-based circuit are implementation choices; within their practical limits, different topologies can realize different response targets. A passive filter does not inherently require an inductor, and an active filter is not automatically the correct implementation of a given response.\u003C/p>\n\u003Cp>A single-pole corner frequency is only one part of a specification. It does not prove sufficient attenuation at a rejected frequency or establish that an anti-aliasing requirement has been met. Check the complete response at the actual frequencies of interest.\u003C/p>\n\u003Ch2>Requirements-to-evidence decision matrix\u003C/h2>\n\u003Cp>Use one row of requirements for both candidates. The right-hand columns describe evidence to collect, not assumed outcomes. Record numerical limits, conditions, results, and status in the project’s controlled design record.\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Shared requirement\u003C/th>\n\u003Cth>Evidence for a passive candidate\u003C/th>\n\u003Cth>Evidence for an active candidate\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>Wanted frequencies and gain\u003C/td>\n\u003Ctd>Loaded transfer-function calculation and, where required, measured gain across the passband\u003C/td>\n\u003Ctd>Calculation or simulation including the amplifier, followed by required verification across the same passband\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Rejected frequencies\u003C/td>\n\u003Ctd>Loaded attenuation at each specified frequency, including component and interface variation\u003C/td>\n\u003Ctd>Attenuation with the actual amplifier model and operating conditions; verify that amplifier limitations do not defeat the target\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Phase and timing error\u003C/td>\n\u003Ctd>Phase or timing response at the specified reference planes, including loading\u003C/td>\n\u003Ctd>Equivalent response including amplifier effects; check settling if the requirement calls for it\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Source impedance\u003C/td>\n\u003Ctd>Source model and input impedance interaction over frequency; confirm the source can drive the network\u003C/td>\n\u003Ctd>Input impedance and source-drive analysis for the chosen topology; a powered stage can still load its source\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Load impedance\u003C/td>\n\u003Ctd>Output response with the specified load and its variation, not just an open output\u003C/td>\n\u003Ctd>Output loading, required current, capacitive-load behavior, and stability for the specified load\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Signal swing and linearity\u003C/td>\n\u003Ctd>Component voltage, current, power, and voltage-dependence checks over the required signal range\u003C/td>\n\u003Ctd>Input common-mode range, output swing, distortion or linearity, and current checks under the actual supply and load\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Supply\u003C/td>\n\u003Ctd>Confirm whether any adjacent circuitry changes the comparison; the passive network itself needs no amplifier supply\u003C/td>\n\u003Ctd>Exact supply range, start-up behavior where relevant, and amplifier performance at the specified supply conditions\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Tolerance and temperature\u003C/td>\n\u003Ctd>Worst-case or justified statistical analysis of component values, drift, and source/load variation\u003C/td>\n\u003Ctd>The same analysis plus amplifier parameter variation and topology sensitivity\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Noise\u003C/td>\n\u003Ctd>Resistor and source noise, filtered bandwidth, and the contribution of the following stage\u003C/td>\n\u003Ctd>Source and component noise plus amplifier voltage and current noise, evaluated over the specified bandwidth\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Power and area\u003C/td>\n\u003Ctd>Component dissipation and a layout-based area estimate\u003C/td>\n\u003Ctd>Supply consumption, component dissipation, and layout-based area including supporting parts\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Verification and acceptance\u003C/td>\n\u003Ctd>Defined test conditions, expected limits, uncertainty, and recorded results\u003C/td>\n\u003Ctd>The same acceptance framework, with amplifier-specific conditions and stability evidence added\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>The matrix prevents a common comparison error: judging a passive circuit with a real load against an active circuit modeled with ideal inputs, unlimited output swing, or an unspecified amplifier. Use the same source, load, signal, frequency limits, environmental range, and acceptance criteria for both.\u003C/p>\n\u003Cp>The final disposition should be explicit: \u003Cstrong>passes\u003C/strong>, \u003Cstrong>fails\u003C/strong>, or \u003Cstrong>not yet verified\u003C/strong>, with a reference to the calculation, simulation, data-sheet condition, or test record supporting each entry.\u003C/p>\n\u003Ch2>A fictional passive RC loading calculation\u003C/h2>\n\u003Cp>The following calculation is \u003Cstrong>fictional and not a measured design\u003C/strong>. It illustrates loading; it is not a passive-versus-active performance conclusion.\u003C/p>\n\u003Cp>Assume an ideal voltage source with a \u003Cstrong>1 kΩ series source resistance\u003C/strong>, followed by a \u003Cstrong>10 kΩ series resistor\u003C/strong>. At the output node, a \u003Cstrong>10 nF capacitor\u003C/strong> and a purely resistive \u003Cstrong>10 kΩ load\u003C/strong> both connect to ground. Neglect capacitor and source parasitics and use linear small-signal assumptions.\u003C/p>\n\u003Cp>\u003Cimg src=\"/assets/blogs/active-passive-analog-filter-selection/loaded-rc-example.svg\" alt=\"Hypothetical RC filter showing source resistance, series resistor, parallel capacitor and load\">\u003C/p>\n\u003Cp>At DC, the capacitor is open. The load and the total series resistance form a divider:\u003C/p>\n\u003Cp>\u003Cstrong>Vout / Vsource = 10 kΩ / (1 kΩ + 10 kΩ + 10 kΩ) = 10 / 21 ≈ 0.476\u003C/strong>\u003C/p>\n\u003Cp>For the pole calculation, set the ideal voltage source to zero and find the resistance seen by the capacitor:\u003C/p>\n\u003Cp>\u003Cstrong>Rth = (11 kΩ × 10 kΩ) / (11 kΩ + 10 kΩ) ≈ 5.238 kΩ\u003C/strong>\u003C/p>\n\u003Cp>\u003Cstrong>fp = 1 / (2π Rth C) ≈ 3.04 kHz\u003C/strong>\u003C/p>\n\u003Cp>With an \u003Cstrong>open-circuit load\u003C/strong> instead, no DC current flows through the series resistances. The DC voltage gain is therefore \u003Cstrong>1\u003C/strong>, and the capacitor sees \u003Cstrong>11 kΩ\u003C/strong>, giving a pole of approximately \u003Cstrong>1.45 kHz\u003C/strong>.\u003C/p>\n\u003Cp>The same nominal resistor and capacitor network consequently has a different gain and pole when the stated load is connected. Neither case says whether the filter meets a real project’s passband, stopband, phase, noise, or tolerance limits.\u003C/p>\n\u003Cp>An active candidate for that project would need its own specification and independent verification using the \u003Cstrong>exact amplifier data sheet and applicable conditions\u003C/strong>. No particular active circuit is assumed or validated by this example.\u003C/p>\n\u003Ch3>Turn the calculation into a decision record\u003C/h3>\n\u003Cp>Suppose the fictional project requires a DC voltage gain of at least \u003Cstrong>0.80\u003C/strong> from the ideal source to the output with the \u003Cstrong>10 kΩ load\u003C/strong> connected. The example's calculated gain of \u003Cstrong>0.476\u003C/strong> fails that one requirement under the stated nominal assumptions. Reject or revise \u003Cstrong>this particular loaded RC candidate\u003C/strong>; the open-load gain of 1 does not rescue it because the specified load is connected.\u003C/p>\n\u003Cp>This is not proof that every passive design fails. A redesigned passive network could be evaluated against the same gain, source and load conditions and against the still-unspecified frequency response, noise and other project limits. An active candidate is \u003Cstrong>not yet verified\u003C/strong>: select its circuit and amplifier, then check the same interface and gain requirements alongside supply, swing, stability and the remaining limits. A candidate passes only when every applicable requirement has evidence.\u003C/p>\n\u003Ch2>Compare implementations under real conditions\u003C/h2>\n\u003Ch3>Passive candidate\u003C/h3>\n\u003Cp>Calculate the transfer function with the source and load included. Then vary the impedances and component values over their allowed ranges. If either interface is frequency-dependent, represent that behavior rather than assuming a fixed resistance.\u003C/p>\n\u003Cp>Check practical component behavior as well as nominal values. Resistor tolerance, temperature coefficient, and dissipation can matter; capacitor tolerance, dielectric behavior, voltage dependence, and temperature drift can shift the response. Layout parasitics may also matter to the frequencies and impedances involved.\u003C/p>\n\u003Cp>Passive does not mean noiseless: resistors contribute thermal noise, and the network changes the noise delivered to the following stage. Nor does passive mean voltage gain must be lower at every frequency than that of an active alternative; the answer depends on the networks, reference planes, and frequency.\u003C/p>\n\u003Ch3>Active candidate\u003C/h3>\n\u003Cp>Specify the topology and exact amplifier before making a compliance claim. Check the data sheet at the project’s supply, load, temperature, signal amplitude, and frequency conditions. Evidence should address at least:\u003C/p>\n\u003Cul>\n\u003Cli>Input common-mode range and input loading.\u003C/li>\n\u003Cli>Output swing and current into the actual load.\u003C/li>\n\u003Cli>Frequency-dependent gain and phase, noise, and distortion where required.\u003C/li>\n\u003Cli>Stability with the feedback network and load, including relevant capacitance.\u003C/li>\n\u003Cli>Supply current and behavior over the permitted supply range.\u003C/li>\n\u003C/ul>\n\u003Cp>An amplifier can provide gain or buffering, but it does not eliminate all source and load interactions. Simulation can help explore those interactions; its result is only as applicable as its models and conditions. Where the project requires measurement, retain results from a representative assembled design rather than treating a nominal simulation as proof.\u003C/p>\n\u003Cp>\u003Ca href=\"https://www.ti.com/lit/an/snoa224a/snoa224a.pdf\">TI AN-779, SNOA224A\u003C/a>, is a historical introductory reference hosted by TI for filter concepts. \u003Ca href=\"https://www.ti.com/lit/an/sloa049d/sloa049d.pdf\">TI SLOA049D\u003C/a>, revised February 2023, provides technical context for active low-pass filter design. Neither replaces the selected amplifier’s data sheet or the project’s acceptance criteria.\u003C/p>\n\u003Ch2>Layout and evidence: close the loop\u003C/h2>\n\u003Cp>Before release, translate the chosen candidate into a layout and verification plan. Keep the signal path and return path understandable; account for coupling from nearby switching or noisy circuits; and place components so that unwanted parasitics do not invalidate the analysis. For an active stage, follow the selected amplifier’s layout and supply-decoupling guidance.\u003C/p>\n\u003Cp>Identify the input and output reference planes in both the schematic and test procedure. A measurement made through an unintended source or load impedance can produce a valid reading of the wrong circuit. The test plan should state the stimulus, supply, load, frequency points or sweep, environmental conditions, limits, measurement uncertainty, and how results are recorded. Add guard bands or repeatability checks where the project’s quality plan requires them.\u003C/p>\n\u003Cp>Do not treat an untested prototype as production evidence. Conversely, a good result from one prototype does not by itself demonstrate tolerance across components, temperature, or production variation. Decide which analyses and tests are required for release, and record any remaining risks.\u003C/p>\n\u003Cp>For a broader overview of board parts that can appear in a BOM, see \u003Ca href=\"/en/blog/circuit-board-components/\">circuit board components\u003C/a>.\u003C/p>\n\u003Ch2>Revision-controlled PCB and PCBA handoff\u003C/h2>\n\u003Cp>A filter decision is useful only if the released board and assembly preserve it. Package the following in a revision-controlled handoff:\u003C/p>\n\u003Col>\n\u003Cli>\u003Cstrong>Requirements and decision record:\u003C/strong> the common requirements, matrix disposition, approved topology, reference planes, evidence links or identifiers, and open exceptions.\u003C/li>\n\u003Cli>\u003Cstrong>PCB release:\u003C/strong> board fabrication data, stackup and material requirements, controlled dimensions, drawings, and revision identifiers.\u003C/li>\n\u003Cli>\u003Cstrong>PCBA release:\u003C/strong> schematic revision, assembly drawing, placement data, BOM with manufacturer part numbers, approved alternatives, and critical component tolerances and ratings.\u003C/li>\n\u003Cli>\u003Cstrong>Verification plan:\u003C/strong> test conditions, acceptance limits, sample or coverage plan, uncertainty treatment, reporting format, and disposition rules for failures. A \u003Ca href=\"/en/blog/pcb-assembly-inspection-report/\">PCB assembly inspection report template\u003C/a> can help document the agreed inspection results.\u003C/li>\n\u003Cli>\u003Cstrong>Change control:\u003C/strong> who approves \u003Ca href=\"/en/blog/pcb-component-substitution-approval/\">component substitutions\u003C/a>, layout changes, rework, or revised limits; how affected evidence is rerun; and how the as-built configuration is recorded.\u003C/li>\n\u003C/ol>\n\u003Cp>Keep responsibilities separate:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cstrong>Engineer or design owner:\u003C/strong> defines requirements, selects the circuit, supplies the released design, evaluates changes, and determines whether technical evidence supports the design decision.\u003C/li>\n\u003Cli>\u003Cstrong>Manufacturer:\u003C/strong> builds the PCB or assembles the PCBA to the agreed release and reports manufacturing or assembly issues. Bare-board fabrication checks do not establish assembled filter performance.\u003C/li>\n\u003Cli>\u003Cstrong>Quality team and customer, as applicable:\u003C/strong> agree acceptance and disposition, review required records, and decide whether the delivered item satisfies contractual and system-level needs. System qualification is a separate activity unless explicitly included in an agreed scope.\u003C/li>\n\u003C/ul>\n\u003Cp>If assembly or electrical testing is requested, identify the responsible party and exact scope in the RFQ. Do not assume a fabricator will verify the assembled circuit, or that a PCBA test alone qualifies the complete system. A \u003Ca href=\"/en/quote/\">quote request\u003C/a> should reference the released package and identify open questions rather than substitute for the design record.\u003C/p>\n\u003Cdiv data-component=\"BlogQuickQuoteInline\">\u003C/div>\n\n\u003Ch2>Frequently asked questions\u003C/h2>\n\u003C!-- faq:start -->\n\n\u003Ch3>Is an active filter always better when gain is needed?\u003C/h3>\n\u003Cp>No. An active stage can provide gain, but the selected amplifier must meet the required signal swing, noise, supply, stability, and frequency-response conditions. Compare the complete signal-chain result with the passive alternative.\u003C/p>\n\u003Ch3>Can a passive RC filter meet a sharp rejection requirement?\u003C/h3>\n\u003Cp>It can meet a requirement only if its calculated and verified loaded response provides enough attenuation and acceptable passband behavior. A first-order corner alone does not establish that result; a different order or implementation may be necessary.\u003C/p>\n\u003Ch3>Does a buffer remove loading from the filter?\u003C/h3>\n\u003Cp>Not completely. A buffer has finite input characteristics, and its output must drive the actual load while remaining within its current, swing, and stability limits. Analyze both interfaces.\u003C/p>\n\u003Ch3>What should I do if the source or load is not yet known?\u003C/h3>\n\u003Cp>Mark the comparison \u003Cstrong>not yet verified\u003C/strong>. Agree a permitted impedance range or obtain interface data, then analyze and test both candidates against that range. An open-load calculation is not a substitute for an unspecified real load.\u003C/p>\n\u003Ch3>What evidence belongs in the manufacturing handoff?\u003C/h3>\n\u003Cp>Include the controlled design and BOM, the decision record, applicable PCB and assembly files, and the agreed inspection or electrical-test plan. Assign responsibility for execution and acceptance; fabrication records alone do not prove filter or system performance.\u003C/p>\n\u003C!-- faq:end -->\n\u003Csection class=\"related-links\" aria-label=\"Related\">\u003Ch3>Related links\u003C/h3>\u003Cul>\u003Cli>\u003Ca href=\"/en/blog/spectrum-filter-test-measurement/\">Spectrum Filter PCB Guide: What to Check for RF Layout, Passband Performance, and VNA Validation\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/circuit-board-components/\">Circuit Board Components: Common PCB Parts, What They Do and How to Identify Them\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/pcb-assembly-inspection-report/\">PCB Assembly Inspection Report Format: Template and Checklist\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/pcb-component-substitution-approval/\">PCB Component Substitution: An Approval Checklist\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/quote/\">quote request\u003C/a>\u003C/li>\u003C/ul>\u003C/section>",[14,17,20,23,27],{"question":15,"answer":16,"answerText":16},"Is an active filter always better when gain is needed?","No. An active stage can provide gain, but the selected amplifier must meet the required signal swing, noise, supply, stability, and frequency-response conditions. Compare the complete signal-chain result with the passive alternative.",{"question":18,"answer":19,"answerText":19},"Can a passive RC filter meet a sharp rejection requirement?","It can meet a requirement only if its calculated and verified loaded response provides enough attenuation and acceptable passband behavior. A first-order corner alone does not establish that result; a different order or implementation may be necessary.",{"question":21,"answer":22,"answerText":22},"Does a buffer remove loading from the filter?","Not completely. A buffer has finite input characteristics, and its output must drive the actual load while remaining within its current, swing, and stability limits. Analyze both interfaces.",{"question":24,"answer":25,"answerText":26},"What should I do if the source or load is not yet known?","Mark the comparison **not yet verified**. Agree a permitted impedance range or obtain interface data, then analyze and test both candidates against that range. An open-load calculation is not a substitute for an unspecified real load.","Mark the comparison not yet verified. Agree a permitted impedance range or obtain interface data, then analyze and test both candidates against that range. An open-load calculation is not a substitute for an unspecified real load.",{"question":28,"answer":29,"answerText":29},"What evidence belongs in the manufacturing handoff?","Include the controlled design and BOM, the decision record, applicable PCB and assembly files, and the agreed inspection or electrical-test plan. Assign responsibility for execution and acceptance; fabrication records alone do not prove filter or system performance.",[31,32,33],"analog filters","PCB design","signal conditioning","active-passive-analog-filter-selection","en",[35,37,38,39,40,41],"de","it","cn","fr","ru",{"blog":43,"breadcrumb":52},{"@context":44,"@type":45,"headline":4,"description":5,"image":8,"url":46,"datePublished":6,"dateModified":6,"timeRequired":11,"keywords":47,"articleSection":7,"author":48,"publisher":51},"https://schema.org","BlogPosting","https://hilpcb.com/en/blog/active-passive-analog-filter-selection/","analog filters, PCB design, signal conditioning",{"@type":49,"name":50},"Organization","HILPCB",{"@type":49,"name":50},{"@context":44,"@type":53,"itemListElement":54},"BreadcrumbList",[55,60,64],{"@type":56,"position":57,"name":58,"item":59},"ListItem",1,"Home","https://hilpcb.com/",{"@type":56,"position":61,"name":62,"item":63},2,"Blog","https://hilpcb.com/en/blog/",{"@type":56,"position":65,"name":34,"item":46},3,1794483749914]