At HILPCB, we manufacture microvias PCBs using advanced laser drilling systems alongside our complete range of services from conventional HDI through rigid-flex hybrids. Our integrated capabilities include design optimization, precision fabrication, and complete assembly for complex electronics requiring maximum density and reliability.
Understanding Microvia Technology and Types
Defining Microvias and Size Ranges
IPC standards define microvias as holes ≤0.15mm diameter drilled using laser technology rather than mechanical drilling. This size threshold reflects practical limits—mechanical drilling becomes unreliable and expensive below 0.20mm diameter due to drill bit fragility and breaking.
Microvia Size Categories:
Ultra-fine microvias measuring 0.05-0.08mm diameter enable maximum density routing between very fine-pitch components like 0.3mm-pitch BGAs. These require precise laser control and specialized plating processes to ensure complete fill. We typically use UV lasers for these smallest features, achieving clean drilling through thin dielectric films.
Standard microvias ranging 0.10-0.15mm diameter represent mainstream HDI technology balancing capability and cost. Our CO2 laser systems drill these sizes efficiently through standard build-up materials. Most smartphones, tablets, and portable devices use primarily this size range.
Large microvias from 0.15-0.25mm diameter bridge between microvia and mechanical drilling territories. These provide cost-effective HDI where ultra-fine features aren't required. We sometimes mix sizes within single designs—using small microvias only where necessary and larger sizes where adequate.
Blind Microvias: Surface to Inner Layer Connections
Blind microvias connect outer layers to one or more inner layers without traversing the entire board thickness—the most common microvia type in production electronics.
Blind Microvia Advantages:
Routing density increases dramatically versus through-vias since blind microvias don't consume space throughout full stack. This enables denser component placement especially with fine-pitch BGAs where routing between balls determines achievable density.
Signal integrity benefits from shorter interconnect lengths and eliminated via stubs that degrade high-speed signals. A blind microvia from layer 1 to layer 3 creates zero stub versus through-via extending to board bottom creating significant discontinuity.
Manufacturing cost stays reasonable since blind microvias require only single-stage processing—laser drill from one surface followed by copper plating. More complex via structures multiply manufacturing stages and costs proportionally.
Our multilayer PCB processes integrate blind microvia technology routinely, maintaining the same quality standards whether manufacturing 4-layer or 16-layer boards with HDI sections.
Buried Microvias: Internal Layer Interconnections
Buried microvias connect internal layers without reaching either board surface—providing routing flexibility but requiring additional manufacturing complexity.
Buried Microvia Applications:
High-speed designs sometimes route critical signals on internal layers to avoid surface noise and improve shielding. Buried microvias enable layer transitions within these internal routing planes without bringing signals to outer layers where they could couple interference.
Via count reduction at board surfaces matters when surface area is scarce. Eliminating through-vias from surfaces frees space for more component pads—especially valuable with ultra-dense smartphone layouts where every 0.1mm matters.
Manufacturing complexity increases since buried vias require drilling and plating before final lamination—essentially becoming part of sub-assemblies that then combine into finished boards. This adds 2-4 days to production schedules versus blind-via-only designs.
X-ray inspection verifies buried via formation since they're invisible from outside. We image 100% of panels containing buried vias, ensuring quality before subsequent processing where defects would become uncorrectable.
Stacked and Staggered Microvia Strategies
Multiple microvia layers enable routing between numerous layers—but arrangement dramatically affects reliability and cost.
Stacked Microvia Approach:
Placing microvias directly on top of each other through multiple layers creates shortest possible signal paths. This maximizes routing density and provides optimal electrical performance for high-speed differential pairs requiring precise length matching.
However, stacking concentrates mechanical stress at via interfaces during thermal cycling. Each copper-dielectric boundary represents potential delamination site, and stacking multiplies this risk. Our reliability testing shows stacked microvias require enhanced process control to achieve acceptable field lifetimes.
Staggered Microvia Alternative:
Offsetting microvias slightly between layers distributes stress more evenly. Thermal cycling performance improves significantly—we've measured 3-5x increase in cycles-to-failure versus comparable stacked structures.
Routing complexity increases with staggered approaches since direct vertical connections aren't possible. Designers must plan layer transitions more carefully. Cost implications are minimal—staggered and stacked via fabrication costs nearly identical.
For most applications, we recommend staggering microvias unless electrical performance absolutely demands stacked configurations. Submit your design for feasibility analysis—we'll model both approaches and recommend optimal balance.
Laser Drilling Technology for Microvia Formation
CO2 Laser Drilling Process
Carbon dioxide lasers operating at 10.6 micron wavelength efficiently ablate organic PCB materials—the primary technology for standard microvia drilling.
CO2 Laser Capabilities:
Our CO2 systems deliver focused energy pulses that vaporize dielectric materials including FR-4, polyimide, and most prepregs used in flexible circuits. Pulse duration and energy density require optimization for each material stack to achieve clean drilling without damaging underlying copper pads.
Drilling depth control determines whether microvias stop at first copper layer (standard blind vias) or penetrate additional layers (stacked blind vias). Multi-pulse sequences enable controlled depth drilling—initial pulses remove bulk dielectric, final pulses clean target pad without over-drilling.
Throughput on modern CO2 systems reaches 300-500 microvias per second depending on material thickness and via diameter. This speed makes laser drilling economical even for very high via count designs—10,000+ microvias per panel take only minutes of drill time.
UV Laser Drilling for Ultra-Fine Features
Ultraviolet lasers operating at 355nm wavelength enable smaller feature sizes than CO2 lasers achieve, though only on photosensitive materials.
UV Laser Applications:
Minimum feature size drops to 0.03mm versus 0.05mm lower limit for CO2 drilling. This matters for ultra-dense IC substrates and advanced HDI designs pushing density limits. We've used UV drilling for smartphone mainboards and high-end wearables requiring absolute minimum via sizes.
Photosensitive dielectrics optimized for UV absorption drill most efficiently, achieving clean holes with minimal thermal damage to surrounding material. Standard FR-4 and polyimide drill poorly with UV lasers—material selection must consider drilling technology from initial design stages.
Cost premium for UV drilling versus CO2 reflects both equipment investment and typically lower throughput. We apply UV technology only where features genuinely require it—using CO2 for standard microvias within same boards keeps costs reasonable.
Desmear and Surface Preparation
After laser drilling, removing resin smear and conditioning hole walls ensures reliable copper plating and strong adhesion.
Desmear Process Optimization:
Plasma desmear uses reactive gases to clean via walls through chemical etching without mechanical scrubbing. This gentler approach works better on fine features versus permanganate-based chemical desmear that can attack thin dielectrics or damage delicate via walls.
We've optimized plasma parameters specifically for microvia processing—chamber pressure, gas mixture, RF power, and exposure time all affect cleaning effectiveness versus potential damage. Cross-sectional analysis validates proper cleaning on every new material combination.
Copper micro-roughening follows desmear, preparing surfaces for electroless copper deposition. Controlled roughness maximizes adhesion while minimizing signal loss at high frequencies—balance mattering for high-speed designs operating above 10 GHz.
Copper Plating and Microvia Fill
Panel Plating vs Pattern Plating
Two fundamental approaches exist for copper deposition—full panel plating builds up all copper simultaneously, while pattern plating adds copper only where traces exist.
Panel Plating Approach:
All microvias and surface areas receive identical copper thickness since entire panel plates uniformly. This simplifies process control and ensures microvia fill reliability. However, subsequent etching must remove copper between features—challenging as trace density increases.
Our panel plating process delivers ±2 micron thickness uniformity across 600x450mm production panels. This consistency ensures microvias in panel corners fill as completely as those in center areas—preventing yield loss from position-dependent defects.
Pattern Plating Alternative:
Selective copper deposition only where required reduces etching difficulty on very fine-line designs. However, microvia fill becomes more challenging since vias plate through photoresist that partially blocks electrolyte flow into cavities.
We use panel plating for most microvias PCB applications as it provides most reliable fill. Pattern plating applies only when trace densities or aspect ratios exceed panel plating capabilities—rare with modern etching technology.
Via Fill Technology and Reliability
Achieving complete copper fill of blind microvias proves essential for long-term reliability—partially filled vias can fail during thermal cycling through crack propagation.
Enhanced Fill Methods:
Specialized plating chemistry with brighteners, levelers, and via-fill additives promotes bottom-up copper growth inside cavities. These organic additives differentially inhibit plating at via opening versus bottom, forcing copper to build from pad upward rather than plating faster at top.
Pulse plating—alternating current on and off rather than continuous DC—improves fill reliability by allowing copper ions to diffuse into via cavities during off periods. We optimize pulse parameters for each stackup configuration and via geometry.
Cross-sectional microsection analysis verifies >95% via fill on production lots. Samples cut from panel edges undergo polishing and optical microscopy—any voids visible under 200x magnification trigger investigation before shipping production.
Copper Thickness Uniformity
Consistent copper weight across panels and between boards within panels directly affects electrical performance and manufacturing yield.
Thickness Control Methods:
Horizontal conveyorized plating provides superior uniformity versus vertical rack systems. Boards travel horizontally through plating tanks with aeration and agitation ensuring consistent electrolyte contact. Our systems maintain ±10% copper thickness variation across full panels.
Automated thickness measurement after plating uses X-ray fluorescence to verify copper weight at multiple panel locations. This data guides process adjustments maintaining consistent output even as bath chemistry ages.
Copper thickness particularly matters for controlled impedance traces where 10% thickness variation translates directly to impedance shift. Our backplane PCB production requiring tight impedance control benefits from enhanced copper uniformity monitoring.
Design Guidelines for Optimal Microvia Performance
Via Pad Sizing and Capture Pad Design
Proper pad dimensions ensure reliable connections while enabling dense routing between pads.
Pad Design Rules:
Capture pad diameter equals via diameter plus 0.10mm minimum annular ring—providing adequate copper for drill position tolerance and copper plating variation. On 0.10mm microvias, this yields 0.20mm pads—small enough for routing between 0.5mm-pitch BGA balls.
Larger pads improve manufacturing yield and long-term reliability at cost of reduced routing density. We recommend oversizing pads by 0.05mm where space permits—reliability improvement outweighs minor density reduction.
Via-in-pad construction places microvias directly within component SMT pads, maximizing density but requiring filled and planarized vias before assembly. Our process copper-fills vias then planarizes through mechanical polishing or additional plating—enabling direct component mounting over vias.
Microvia Spacing and Density Limits
How closely you can place microvias affects achievable routing density—but minimum spacing balances yield against density.
Spacing Considerations:
Our standard 0.25mm center-to-center spacing provides good yield with adequate density for most applications. This enables via placement between 0.5mm-pitch BGA balls—suitable for majority of consumer electronics and portable devices.
Reduced 0.20mm spacing offers higher density at some yield risk. We recommend this only where density absolutely requires it—generally for smartphone mainboards and similar space-constrained designs. Copper bridging between adjacent vias becomes more common as spacing decreases.
Maximum practical microvia density runs approximately 150-200 vias per square centimeter before plating uniformity and reliability concerns multiply. Exceeding this should trigger reassessment of board size, layer count, or component placement strategy.
Layer Transition Planning
Efficient microvia usage requires thoughtful layer stack planning from initial schematic through final layout.
Layer Assignment Strategy:
Group signals by function and required routing layers—digital logic, power distribution, high-speed signals each optimize differently. This natural segregation reduces layer transition count minimizing microvia usage.
HDI buildup layers should carry primarily signals requiring the finest routing. Power distribution typically uses inner layers accessible through larger vias or even conventional through-holes where space permits. This reserves expensive microvia resources for traces genuinely needing them.
Analyze via count before finalizing layout—excessive transitions indicate suboptimal layer assignment. We often help customers reduce via counts 20-30% through layer reassignment without affecting functionality or electrical performance.
Quality Control and Testing for Microvias PCBs
Automated Optical Inspection of Laser-Drilled Features
High-resolution imaging systems examine every drilled microvia before copper plating—catching position errors, size deviations, or incomplete drilling early.
AOI Verification Steps:
Diameter measurement confirms laser drilling achieved target size within ±0.01mm tolerance. Undersized vias won't plate reliably; oversized vias may violate spacing rules to adjacent features.
Position verification ensures microvias align with intended capture pads within ±0.03mm tolerance. Misalignment could miss pads entirely or create marginal connections prone to early failure.
Debris detection identifies any remaining material partially blocking microvias that would interfere with plating. Our inspection flags even small residue requiring additional cleaning before plating proceeds.
Electrical Testing with Flying Probe
Microvias PCBs with thousands of interconnection points require comprehensive electrical testing validating every connection.
Test Coverage Strategy:
Flying probe systems check every net for both continuity and isolation without expensive test fixtures. Probe heads position with ±25 micron accuracy—adequate for testing 0.10mm microvias and fine-pitch pads typical of HDI designs.
We test 100% of microvias PCB production regardless of quantity. No statistical sampling—every board receives full electrical verification. This catches intermittent issues that
might escape batch testing approaches.
Test time scales with via count—boards with 10,000+ microvias may require 15-20 minutes testing per panel. We factor this into lead time calculations ensuring realistic delivery commitments. Our turnkey assembly services extend testing through functional validation of assembled boards.
Cross-Sectional Failure Analysis
Destructive microsection analysis validates internal structure quality through direct observation of via fill and layer bonding.
Microsection Evaluation:
Coupon samples undergo cutting, mounting, polishing, and optical microscopy at 200-400x magnification. We examine via copper fill percentage, interface adhesion quality, and dielectric integrity across all layers.
Target specification demands >95% via fill for production acceptance. Voids visible in cross-sections indicate insufficient plating chemistry or inadequate process parameters requiring correction before shipping production lots.
Long-term reliability testing subjects sample boards to 500-1000 thermal cycles from -40°C to +125°C while monitoring electrical continuity. This accelerated stress reveals latent defects that might cause field failures—we address these through process adjustments before they affect customers.
Working with HILPCB for Microvias PCB Manufacturing
Design & DFM Support
Every microvias PCB begins with a detailed design-for-manufacturing (DFM) review. Our engineers verify via dimensions, stack-up alignment, and material compatibility before fabrication—preventing yield loss and rework later. We evaluate layer buildup, lamination sequence, and dielectric selection to ensure microvia reliability under laser drilling, plating, and reflow conditions. When needed, we recommend optimized alternatives that simplify production while maintaining performance.
From Prototype to Mass Production
HILPCB supports your entire product lifecycle—from single prototypes to full-scale production—with the same process stability. Quick-turn prototypes validate design intent within 10–15 days, while pilot runs confirm process repeatability before volume launch. Our large-volume assembly lines scale to millions of units annually, ensuring consistent quality and cost efficiency for demanding HDI programs.
Integrated Assembly & Testing
We deliver end-to-end solutions, combining fabrication with high-precision SMT assembly and through-hole integration. Our SMT lines support 01005 packages, fine-pitch BGAs, and via-in-pad designs with ±25 μm placement accuracy. Final functional testing and inspection verify both board integrity and full assembly performance—ensuring each microvias PCB meets design, reliability, and delivery requirements before shipment.