[{"data":1,"prerenderedAt":67},["ShallowReactive",2],{"blog-pcb-fiducial-marks-en":3},{"title":4,"description":5,"date":6,"lastUpdated":6,"category":7,"image":8,"readingTime":9,"wordCount":10,"timeRequired":11,"htmlContent":12,"faq":13,"tags":27,"slug":35,"sourceLocale":36,"availableLocales":37,"jsonld":43},"PCB Fiducial Marks: IPC-7351B Sizing, Global vs. Local Placement, and SMT Vision Rules","How to place fiducials on PCB layouts for automated SMT assembly: equipment-confirmed fiducial sizing, solder mask keep-out clearances, Global vs. Local fiducials, and surface finish contrast.","2026-10-15","manufacturing",null,13,2469,"PT13M","\u003Cp>A PCB fiducial is an optical reference used to align printing and component placement. As one assembler-specific example, \u003Ca href=\"https://www.newmatik.com/knowledge-base/designing-fiducials-for-smd-assembly\">Newmatik recommends a 1 mm copper dot with a concentric 2 mm solder-mask opening\u003C/a>. Agree on mark size, quantity and placement with the actual assembler; this example is not a universal IPC or SMEMA dimensional requirement.\u003C/p>\n\u003Cp>Fiducials can support alignment and selected distortion corrections on printers, placement machines and inspection equipment. The available compensation depends on the machine and program; three marks do not establish a measurement of every nonlinear board distortion. Below are the dimensional rules, Global versus Local placement criteria, surface finish trade-offs, and CAM release checks for a production-ready fiducial PCB design.\u003C/p>\n\u003Ch2>How do SMT vision cameras read fiducial marks on a PCB?\u003C/h2>\n\u003Cp>Downward-looking CCD and CMOS alignment cameras mounted on stencil printers and pick-and-place heads do not look for physical edges of the board; they calculate the mathematical center of etched copper landmarks using coaxial red, white, or blue LED ring illumination.\u003C/p>\n\u003Cp>A vision system needs a repeatable contrast boundary. Its algorithm, lighting and demonstrated repeatability are equipment-specific:\u003C/p>\n\u003Col>\n\u003Cli>The flat metallic copper circle reflects coaxial light directly back into the lens, registering as a high-intensity bright disc.\u003C/li>\n\u003Cli>The concentric bare dielectric clearance ring (where both copper and solder mask are stripped away) scatters or absorbs incident light, registering as a dark, uniform background ring.\u003C/li>\n\u003Cli>Any copper trace, ground pour, silkscreen character, or encroaching solder mask edge inside that clearance ring distorts the circular boundary into an irregular shape, shifting the calculated centroid or triggering a vision recognition timeout on the SMT line.\u003C/li>\n\u003C/ol>\n\u003Ch2>Global vs. Local vs. Panel PCB fiducials: which ones does your board need?\u003C/h2>\n\u003Cp>A complete fiducial marks PCB layout uses up to three levels of optical alignment targets depending on panelization and component pitch. Select panel, board and local marks with the assembler. Three global marks are a common starting point; some processes accept two, and local marks depend on package and equipment needs.\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Fiducial Level\u003C/th>\n\u003Cth>Placement Location\u003C/th>\n\u003Cth>Quantity & Geometry\u003C/th>\n\u003Cth>Mathematical Compensation Role\u003C/th>\n\u003Cth>What to confirm with the assembler\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>Panel Rail Fiducials\u003C/td>\n\u003Ctd>Breakaway tooling rails (waste frame, \u003Cspan class=\"math-inline\">≥ 5.0 mm\u003C/span> from conveyor edge)\u003C/td>\n\u003Ctd>3 marks in an asymmetric L-triangle across the panel frame\u003C/td>\n\u003Ctd>Registers the full multi-board array inside the solder paste printer and detects 180° reverse panel loading\u003C/td>\n\u003Ctd>Confirm panel registration and orientation needs\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Global Board Fiducials\u003C/td>\n\u003Ctd>Three outer corners of each individual PCB unit\u003C/td>\n\u003Ctd>3 well-separated marks in the approved pattern\u003C/td>\n\u003Ctd>Supports board alignment and the equipment’s configured compensation\u003C/td>\n\u003Ctd>Confirm count and layout on each assembled side\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Local Component Fiducials\u003C/td>\n\u003Ctd>Diagonally opposite corners outside the component courtyard\u003C/td>\n\u003Ctd>2 marks placed symmetrically across the IC diagonal\u003C/td>\n\u003Ctd>Corrects localized substrate distortion and rotational error right at the fine-pitch land pattern\u003C/td>\n\u003Ctd>Recommended for BGAs \u003Cspan class=\"math-inline\">≤ 0.80 mm\u003C/span> pitch, QFNs/QFPs \u003Cspan class=\"math-inline\">≤ 0.50 mm\u003C/span> pitch, and high-pin-count connectors\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>Two layout rules prevent line-setup errors when placing fiducials PCB targets:\u003C/p>\n\u003Col>\n\u003Cli>\u003Cstrong>Confirm orientation detection:\u003C/strong> An asymmetric mark arrangement can help distinguish panel orientation. Confirm the pattern and search windows with the assembler; do not assume one geometry guarantees that every machine rejects a reversed panel.\u003C/li>\n\u003Cli>\u003Cstrong>Control the side-specific program:\u003C/strong> Confirm top/bottom coordinates, panel keying and program checks with the assembler. There is no universal requirement to offset opposite-side marks by 3–5 mm.\u003C/li>\n\u003C/ol>\n\u003Ch2>What are the IPC-7351B size and clearance rules for fiducial markers on a PCB?\u003C/h2>\n\u003Cp>Standardize the approved fiducial footprint in the ECAD library. The dimensional options below are discussion values, not complete standard requirements or proven limits for every assembly line; confirm all clearances and tolerances before release.\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Dimensional Parameter\u003C/th>\n\u003Cth>Illustrative drawing proposal; assembler approval required\u003C/th>\n\u003Cth>Space-Constrained HDI Option\u003C/th>\n\u003Cth>Constraint to verify for the chosen process\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>Copper Pad Shape & Size\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">1.00 mm\u003C/span> (\u003Cspan class=\"math-inline\">40 mil\u003C/span>) solid filled circle, no drill hole\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">0.80 mm\u003C/span> (\u003Cspan class=\"math-inline\">31.5 mil\u003C/span>) solid circle\u003C/td>\n\u003Ctd>Proposed diameter tolerance to confirm: \u003Cspan class=\"math-inline\">± 25 µm\u003C/span> (\u003Cspan class=\"math-inline\">1 mil\u003C/span>)\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Solder Mask Opening Diameter\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">2.00 mm\u003C/span> (\u003Cspan class=\"math-inline\">80 mil\u003C/span>), concentric (\u003Cspan class=\"math-inline\">2×\u003C/span> pad diameter)\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">1.60 mm\u003C/span> (\u003Cspan class=\"math-inline\">63 mil\u003C/span>) concentric opening\u003C/td>\n\u003Ctd>Proposed bare-substrate ring width to confirm: \u003Cspan class=\"math-inline\">0.35 mm\u003C/span> (\u003Cspan class=\"math-inline\">14 mil\u003C/span>)\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Copper & Trace Keep-Out Zone\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">2.00 mm\u003C/span> to \u003Cspan class=\"math-inline\">3.00 mm\u003C/span> diameter free of any copper pours or traces\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">1.60 mm\u003C/span> diameter keep-out on outer copper layer\u003C/td>\n\u003Ctd>Exposed or masked traces inside the ring create false specular highlights under coaxial LED light\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Silkscreen Legend Clearance\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">≥ 0.50 mm\u003C/span> (\u003Cspan class=\"math-inline\">20 mil\u003C/span>) outside the solder mask opening edge\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">≥ 0.25 mm\u003C/span> (\u003Cspan class=\"math-inline\">10 mil\u003C/span>) outside mask opening\u003C/td>\n\u003Ctd>White silkscreen ink has high optical reflectance and pulls the camera centroid if printed near the ring\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Board Edge & Clamp Clearance\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">≥ 5.00 mm\u003C/span> (\u003Cspan class=\"math-inline\">200 mil\u003C/span>) from routed PCB or rail edge\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">≥ 3.50 mm\u003C/span> (\u003Cspan class=\"math-inline\">138 mil\u003C/span>) only on local marks not clamped by rails\u003C/td>\n\u003Ctd>Confirm the actual conveyor and clamp coverage; SMEMA does not establish one universal covered width\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Inner-Layer Copper Background\u003C/td>\n\u003Ctd>Uniformly blank (no copper) or solid uniform plane under all 3 marks\u003C/td>\n\u003Ctd>Uniform across all fiducials on the same side\u003C/td>\n\u003Ctd>Partial inner-layer copper under only half of a thin FR-4 clearance ring creates uneven translucency\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>You can inspect your exported \u003Ccode>GTL\u003C/code>/\u003Ccode>GTS\u003C/code> layers before releasing files by loading them into our online \u003Ca href=\"/en/tools/gerber-viewer/\">Gerber viewer\u003C/a> to verify that copper ground pours and silkscreen outlines do not clip any fiducial clearance rings.\u003C/p>\n\u003Ch2>How does surface finish affect optical fiducial recognition and cost?\u003C/h2>\n\u003Cp>Because fiducial lands are exposed openings in the solder mask, they receive the same surface finish as the rest of the board's solder pads. However, SMT vision cameras care about \u003Cstrong>surface planarity and contrast consistency across reflow passes\u003C/strong>, not solder wetting alone.\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Surface Finish\u003C/th>\n\u003Cth>Optical Planarity & Contrast\u003C/th>\n\u003Cth>Second-Pass Reflow Stability\u003C/th>\n\u003Cth>Suitability for Fine-Pitch SMT Vision\u003C/th>\n\u003Cth>Relative Fabrication Cost Impact\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>ENIG (Electroless Nickel Immersion Gold)\u003C/td>\n\u003Ctd>Flat planar gold disc; crisp contrast against dark FR-4\u003C/td>\n\u003Ctd>High; gold surface does not oxidize or discolor during first-side reflow\u003C/td>\n\u003Ctd>Candidate for \u003Cspan class=\"math-inline\">0.4 mm\u003C/span> BGA, \u003Ca href=\"/en/products/hdi-pcb/\">HDI PCB\u003C/a>, and double-sided fine-pitch boards\u003C/td>\n\u003Ctd>Moderate baseline adder over HASL/OSP; confirm recognition during line setup\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>OSP (Organic Solderability Preservative)\u003C/td>\n\u003Ctd>Perfectly flat bare copper; moderate contrast against yellow/brown FR-4\u003C/td>\n\u003Ctd>Copper darkens slightly after Lead-Free reflow pass 1 (\u003Cspan class=\"math-inline\">255 to 260 °C\u003C/span>); may require process or camera adjustment\u003C/td>\n\u003Ctd>Widely used in high-volume consumer, mobile, and server SMT lines with modern digital vision cameras\u003C/td>\n\u003Ctd>Obtain a finish-specific quotation; requires clean bare dielectric ring and sealed dry storage\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Immersion Silver (ImAg) / Immersion Tin (ImSn)\u003C/td>\n\u003Ctd>Flat, bright metallic surface; strong initial specular reflectance\u003C/td>\n\u003Ctd>Good; ImAg requires sulfur-free packaging to prevent tarnishing prior to assembly\u003C/td>\n\u003Ctd>Suitable for fine-pitch and high-frequency boards\u003C/td>\n\u003Ctd>Compare the actual finish quotations\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Lead-Free HASL (Hot Air Solder Leveling)\u003C/td>\n\u003Ctd>Domed, uneven solder meniscus (\u003Cspan class=\"math-inline\">15 to 40 µm\u003C/span> crown variation)\u003C/td>\n\u003Ctd>Meniscus dome acts like a curved mirror, scattering coaxial ring light off-axis\u003C/td>\n\u003Ctd>Acceptable for standard pitch (\u003Cspan class=\"math-inline\">≥ 0.8 mm\u003C/span>); avoid for ultra-fine-pitch (\u003Cspan class=\"math-inline\">≤ 0.5 mm\u003C/span>) QFN/BGA arrays\u003C/td>\n\u003Ctd>Standard baseline for simple 1–2 layer THT and large-pitch SMT boards\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>Contrary to a common misconception, bare copper protected with \u003Cstrong>OSP\u003C/strong> is not prohibited on fine-pitch boards—in fact, it is standard on high-volume smartphone and computer motherboards. What matters on an OSP board is keeping the bare FR-4 clearance ring free of inner-layer copper shadows and preventing heavy oxidation before second-side reflow. HASL planarity and optical contrast should be qualified on the actual fiducial and equipment; no fixed centroid error follows from the finish name alone.\u003C/p>\n\u003Ch2>How to diagnose and fix fiducial vision errors on the SMT line\u003C/h2>\n\u003Cp>When a stencil printer or pick-and-place machine stops with a fiducial recognition alarm, use the diagnostic table below to isolate whether the root cause lies in the CAD footprint, bare-board fabrication registration, or camera lighting setup:\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>SMT Line Symptom / Alarm\u003C/th>\n\u003Cth>Physical Root Cause\u003C/th>\n\u003Cth>Stage Detected\u003C/th>\n\u003Cth>Immediate Line Workaround vs. Permanent CAD Fix\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>Camera fails to lock or times out (\u003Ccode>Fiducial Not Found\u003C/code>)\u003C/td>\n\u003Ctd>Solder mask opening omitted on \u003Ccode>GTS\u003C/code>/\u003Ccode>GBS\u003C/code> layer (pad covered by green mask)\u003C/td>\n\u003Ctd>Stencil printer / P&P first-article setup\u003C/td>\n\u003Ctd>Line workaround: teach an alternate bare copper feature or corner pad (reduced accuracy). CAD fix: add \u003Cspan class=\"math-inline\">2.0 mm\u003C/span> mask opening to library symbol\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Calculated centroid shifts by \u003Cspan class=\"math-inline\">30 to 80 µm\u003C/span> (\u003Ccode>Aspect Ratio / Roundness Reject\u003C/code>)\u003C/td>\n\u003Ctd>Solder mask misregistration or copper ground pour clipping one side of the \u003Cspan class=\"math-inline\">2.0 mm\u003C/span> clearance ring\u003C/td>\n\u003Ctd>Pre-production CAM DFM check or SMT vision teaching\u003C/td>\n\u003Ctd>Line workaround: switch camera algorithm from dark-ring to inner-pad edge detection. CAD fix: enforce \u003Cspan class=\"math-inline\">1.0 mm\u003C/span> radial copper and mask keep-out\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Placement head offsets components by several millimeters\u003C/td>\n\u003Ctd>Un-tented \u003Cspan class=\"math-inline\">1.0 mm\u003C/span> test point or via land located within \u003Cspan class=\"math-inline\">3.0 mm\u003C/span> of the true fiducial\u003C/td>\n\u003Ctd>First-Article Inspection (FAI) after placement\u003C/td>\n\u003Ctd>Line workaround: shrink camera search window ROI. CAD fix: tent adjacent vias per IPC-4761 and keep test points \u003Cspan class=\"math-inline\">≥ 3.5 mm\u003C/span> away\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Consistent rotational skew (\u003Cspan class=\"math-inline\">Δ θ\u003C/span>) across long panels\u003C/td>\n\u003Ctd>Only 2 global fiducials placed close together on one end of the board instead of spanning the full diagonal\u003C/td>\n\u003Ctd>Post-placement 3D AOI inspection\u003C/td>\n\u003Ctd>CAD fix: place 3 global fiducials at the maximum diagonal span of the board or panel rails\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Stencil paste print shifted relative to copper pads\u003C/td>\n\u003Ctd>Fiducial included by mistake on the solder paste stencil layer (\u003Ccode>GTP\u003C/code>/\u003Ccode>GBP\u003C/code>), smearing paste over the optical mark\u003C/td>\n\u003Ctd>Inline 3D SPI after stencil print\u003C/td>\n\u003Ctd>Line workaround: wipe fiducial clean and block stencil aperture with kapton tape. CAD fix: remove all fiducial pads from \u003Ccode>GTP\u003C/code>/\u003Ccode>GBP\u003C/code> paste layers\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>Never include fiducial lands on your \u003Ccode>GTP\u003C/code> (Top Paste) or \u003Ccode>GBP\u003C/code> (Bottom Paste) Gerber layers. If the laser-cut stainless steel stencil has an aperture over a fiducial mark, the first squeegee stroke prints tacky solder paste directly onto the optical target, blinding the pick-and-place camera on every board. Ask the \u003Ca href=\"/en/products/smt-assembly/\">SMT assembly\u003C/a> or \u003Ca href=\"/en/services/pcb-design/\">PCB design\u003C/a> team to check unintended paste apertures and obtain approval for any data changes.\u003C/p>\n\u003Ch2>Submit / Release Aid\u003C/h2>\n\u003Cp>\u003Cstrong>Send with the RFQ or release package:\u003C/strong>\u003C/p>\n\u003Col>\n\u003Cli>Gerber (\u003Ccode>RS-274X\u003C/code> or \u003Ccode>Gerber X2\u003C/code>) or \u003Ccode>ODB++\u003C/code> / \u003Ccode>IPC-2581\u003C/code> package with fiducial copper pads on \u003Ccode>GTL\u003C/code>/\u003Ccode>GBL\u003C/code>, concentric \u003Cspan class=\"math-inline\">2×\u003C/span> openings on \u003Ccode>GTS\u003C/code>/\u003Ccode>GBS\u003C/code>, and zero openings on \u003Ccode>GTP\u003C/code>/\u003Ccode>GBP\u003C/code>.\u003C/li>\n\u003Cli>Pick-and-Place centroid file (\u003Ccode>XYR\u003C/code>) containing explicit X/Y coordinates for all Global (\u003Ccode>FID1–FID3\u003C/code>), Panel, and Local fiducials.\u003C/li>\n\u003Cli>Panelization drawing specifying breakaway rail width (\u003Cspan class=\"math-inline\">≥ 5.0 mm\u003C/span>), rail fiducial locations, and tooling hole diameters.\u003C/li>\n\u003Cli>Fabrication drawing noting surface finish (ENIG, OSP, ImAg, or HASL) and IPC-6012 registration class.\u003C/li>\n\u003C/ol>\n\u003Cp>\u003Cstrong>Request from the supplier (evidence you need before sign-off):\u003C/strong>\u003C/p>\n\u003Col>\n\u003Cli>CAM DFM audit report confirming fiducial pad diameter, \u003Cspan class=\"math-inline\">2×\u003C/span> solder mask clearance ring integrity, and zero paste-mask apertures on fiducials.\u003C/li>\n\u003Cli>Working panelization array drawing (\u003Ccode>Panel DWG\u003C/code>) showing asymmetric 3-point rail fiducials and \u003Cspan class=\"math-inline\">≥ 5.0 mm\u003C/span> conveyor clamp clearance before bare-board etching.\u003C/li>\n\u003Cli>Stencil check plot confirming half-etched alignment fiducials on the stencil frame match the PCB panel rail fiducials.\u003C/li>\n\u003Cli>First-Article Inspection (FAI) and 3D SPI/AOI alignment report verifying placement offset is within IPC-A-610 Class 2 or Class 3 limits.\u003C/li>\n\u003C/ol>\n\u003Cp>\u003Cstrong>Owner for each step:\u003C/strong>\u003C/p>\n\u003Cul>\n\u003Cli>Designer: Agree on global, panel and local marks with the assembler, document side-specific orientation and exclude unintended paste apertures.\u003C/li>\n\u003Cli>Quality: Verify solder mask registration tolerance, approve panel array drawing, and sign off on first-article 3D AOI placement accuracy.\u003C/li>\n\u003Cli>Procurement: Confirm whether bare-board vendor or turnkey EMS partner generates the panelized array so rail fiducials match the assembly line conveyors.\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Gate for verification (release decision by stage):\u003C/strong>\u003C/p>\n\u003Cul>\n\u003Cli>EVT: CAM check of \u003Ccode>GTL\u003C/code>/\u003Ccode>GTS\u003C/code>/\u003Ccode>GTP\u003C/code> layer stack + centroid coordinate check on \u003Ccode>FID1–FID3\u003C/code>.\u003C/li>\n\u003Cli>DVT: Panel rail fiducial layout lock + double-sided Top/Bottom coordinate offset verification.\u003C/li>\n\u003Cli>PVT: Check printer and placement vision correlation against the approved recognition and intervention criteria.\u003C/li>\n\u003Cli>MP: Continuous inline 3D SPI and 3D AOI Cp/Cpk placement offset monitoring across production lots.\u003C/li>\n\u003C/ul>\n\u003Cp>When your layout and panelization files are ready for DFM and assembly verification, explore our \u003Ca href=\"/en/products/smt-assembly/\">SMT assembly\u003C/a> and \u003Ca href=\"/en/products/turnkey-assembly/\">turnkey PCB assembly\u003C/a> capabilities or upload your Gerber and centroid package to \u003Ca href=\"/en/quote/\">request a quote\u003C/a>.\u003C/p>\n\u003Cdiv data-component=\"BlogQuickQuoteInline\">\u003C/div>\n\n\u003C!-- faq:start -->\n\u003Ch3>Why are circular fiducial marks on a PCB preferred over square or crosshair shapes?\u003C/h3>\n\u003Cp>Circular fiducial marks on a PCB are preferred because a solid circle's radial edge gradient looks identical to a machine vision camera regardless of small rotational angles (\u003Cspan class=\"math-inline\">Δ θ\u003C/span>). Crosshairs, diamonds, and squares suffer from corner etching rounding during copper fabrication and uneven specular reflections under angled LED ring lights, which reduces sub-pixel centroid repeatability.\u003C/p>\n\u003Ch3>Can a plated through-hole via or test point be used as a PCB fiducial?\u003C/h3>\n\u003Cp>A dedicated solid optical mark is preferred. A drilled through-hole can be unsuitable because the hollow center hole creates a dark void and irregular bevel reflection that confuses circular centroid algorithms. Similarly, functional ICT test points should not double as fiducials because solder paste or probe indentations alter their optical surface. Use the assembler’s approved target geometry; qualify any alternative feature instead of assuming it is interchangeable with a dedicated mark.\u003C/p>\n\u003Ch3>How many fiducials on a PCB are needed for SMT assembly?\u003C/h3>\n\u003Cp>Confirm the layout with the assembler. Three well-separated global marks are a common proposal, but some processes accept two; panel and local marks depend on the panel layout, equipment and package requirements. Newmatik, for example, recommends three global marks and permits a minimum of two for its own process.\u003C/p>\n\u003Ch3>Should PCB fiducials have openings on the solder paste stencil layer?\u003C/h3>\n\u003Cp>Never. A fiducial mark must have a copper pad on the signal layer (\u003Ccode>GTL\u003C/code>/\u003Ccode>GBL\u003C/code>) and a concentric \u003Cspan class=\"math-inline\">2×\u003C/span> opening on the solder mask layer (\u003Ccode>GTS\u003C/code>/\u003Ccode>GBS\u003C/code>), but it must be \u003Cstrong>completely masked off (closed)\u003C/strong> on the solder paste layer (\u003Ccode>GTP\u003C/code>/\u003Ccode>GBP\u003C/code>). Applying solder paste onto a fiducial pad turns it into a domed solder bump during reflow and smears paste across the optical target during stencil printing.\u003C/p>\n\u003C!-- faq:end -->\n\n\u003Cscript type=\"application/ld+json\">\n{\n  \"@context\": \"https://schema.org\",\n  \"@type\": \"TechArticle\",\n  \"headline\": \"PCB Fiducial Marks: IPC-7351B Sizing, Global vs. Local Placement, and SMT Vision Rules\",\n  \"description\": \"How to place fiducials on PCB layouts for automated SMT assembly: equipment-confirmed fiducial sizing, solder mask keep-out clearances, Global vs. Local fiducials, and surface finish contrast.\",\n  \"datePublished\": \"2026-10-15\",\n  \"author\": {\n    \"@type\": \"Organization\",\n    \"name\": \"HilPCB\"\n  },\n  \"publisher\": {\n    \"@type\": \"Organization\",\n    \"name\": \"HilPCB\"\n  },\n  \"about\": {\n    \"@type\": \"Thing\",\n    \"name\": \"PCB Fiducial Marks\"\n  },\n  \"keywords\": [\"fiducial pcb\", \"fiducials on pcb\", \"fiducial marks pcb\", \"fiducials pcb\", \"pcb fiducial\", \"pcb fiducials\", \"fiducial markers pcb\"]\n}\n\u003C/script>\n\u003Csection class=\"related-links\" aria-label=\"Related\">\u003Ch3>Related links\u003C/h3>\u003Cul>\u003Cli>\u003Ca href=\"/en/tools/gerber-viewer/\">Gerber viewer\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/products/hdi-pcb/\">HDI PCB\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/products/smt-assembly/\">SMT assembly\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/services/pcb-design/\">PCB design\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/products/turnkey-assembly/\">turnkey PCB assembly\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/quote/\">request a quote\u003C/a>\u003C/li>\u003C/ul>\u003C/section>",[14,17,20,23],{"question":15,"answer":16,"answerText":16},"Why are circular fiducial marks on a PCB preferred over square or crosshair shapes?","Circular fiducial marks on a PCB are preferred because a solid circle's radial edge gradient looks identical to a machine vision camera regardless of small rotational angles ($\\Delta \\theta$). Crosshairs, diamonds, and squares suffer from corner etching rounding during copper fabrication and uneven specular reflections under angled LED ring lights, which reduces sub-pixel centroid repeatability.",{"question":18,"answer":19,"answerText":19},"Can a plated through-hole via or test point be used as a PCB fiducial?","A dedicated solid optical mark is preferred. A drilled through-hole can be unsuitable because the hollow center hole creates a dark void and irregular bevel reflection that confuses circular centroid algorithms. Similarly, functional ICT test points should not double as fiducials because solder paste or probe indentations alter their optical surface. Use the assembler’s approved target geometry; qualify any alternative feature instead of assuming it is interchangeable with a dedicated mark.",{"question":21,"answer":22,"answerText":22},"How many fiducials on a PCB are needed for SMT assembly?","Confirm the layout with the assembler. Three well-separated global marks are a common proposal, but some processes accept two; panel and local marks depend on the panel layout, equipment and package requirements. Newmatik, for example, recommends three global marks and permits a minimum of two for its own process.",{"question":24,"answer":25,"answerText":26},"Should PCB fiducials have openings on the solder paste stencil layer?","Never. A fiducial mark must have a copper pad on the signal layer (`GTL`/`GBL`) and a concentric $2\\times$ opening on the solder mask layer (`GTS`/`GBS`), but it must be **completely masked off (closed)** on the solder paste layer (`GTP`/`GBP`). Applying solder paste onto a fiducial pad turns it into a domed solder bump during reflow and smears paste across the optical target during stencil printing.","Never. A fiducial mark must have a copper pad on the signal layer (GTL/GBL) and a concentric $2\\times$ opening on the solder mask layer (GTS/GBS), but it must be completely masked off (closed) on the solder paste layer (GTP/GBP). Applying solder paste onto a fiducial pad turns it into a domed solder bump during reflow and smears paste across the optical target during stencil printing.",[28,29,30,31,32,33,34],"fiducial pcb","fiducials on pcb","fiducial marks pcb","fiducials pcb","pcb fiducial","pcb fiducials","fiducial markers pcb","pcb-fiducial-marks","en",[36,38,39,40,41,42],"de","it","cn","fr","ru",{"blog":44,"breadcrumb":53},{"@context":45,"@type":46,"headline":4,"description":5,"url":47,"datePublished":6,"dateModified":6,"timeRequired":11,"keywords":48,"articleSection":7,"author":49,"publisher":52},"https://schema.org","BlogPosting","https://hilpcb.com/en/blog/pcb-fiducial-marks/","fiducial pcb, fiducials on pcb, fiducial marks pcb, fiducials pcb, pcb fiducial, pcb fiducials, fiducial markers pcb",{"@type":50,"name":51},"Organization","HILPCB",{"@type":50,"name":51},{"@context":45,"@type":54,"itemListElement":55},"BreadcrumbList",[56,61,65],{"@type":57,"position":58,"name":59,"item":60},"ListItem",1,"Home","https://hilpcb.com/",{"@type":57,"position":62,"name":63,"item":64},2,"Blog","https://hilpcb.com/en/blog/",{"@type":57,"position":66,"name":35,"item":47},3,1792969676235]