[{"data":1,"prerenderedAt":48},["ShallowReactive",2],{"blog-pcb-trace-width-calculator-en":3},{"title":4,"description":5,"date":6,"lastUpdated":6,"category":7,"image":8,"readingTime":9,"wordCount":10,"timeRequired":11,"htmlContent":12,"faq":13,"tags":14,"slug":22,"sourceLocale":23,"jsonld":24},"PCB Trace Width Calculator: IPC-2152 Formula, Current Capacity and Worked Examples","Calculate PCB trace width and current carrying capacity using IPC-2152 and IPC-2221: formulas, external vs internal lookup tables, and worked engineering examples.","2025-10-10","technology","/assets/img/blogs/circuit-board.webp",10,1838,"PT10M","\u003Cp>A \u003Cstrong>PCB trace width calculator\u003C/strong> calculates the minimum cross-sectional area and conductor width required to safely carry a target electrical current without exceeding a defined temperature rise. When electric current flows through a printed copper trace, electrical resistance generates Joule heating ($I^2R$). Because excessive heat degrades dielectric laminates, delaminates copper foil, and induces thermal drift in nearby components, sizing power and ground traces to verified industry standards—principally IPC-2152 and IPC-2221—is an essential step in every board layout.\u003C/p>\n\u003Cp>Whether you search for a \u003Cstrong>trace width calculator for pcb\u003C/strong>, a \u003Cstrong>pcb trace current calculator\u003C/strong>, or a practical \u003Cstrong>pcb trace size calculator\u003C/strong>, this guide provides the underlying IPC formulas, an engineering lookup table for external and internal layers, step-by-step worked calculations, and clear criteria for when a design must transition from standard routing to heavy copper.\u003C/p>\n\u003Cdiv data-component=\"BlogQuickQuoteInline\">\u003C/div>\n\n\u003Ch2>What Is a PCB Trace Width Calculator?\u003C/h2>\n\u003Cp>A \u003Cstrong>trace width calculator\u003C/strong> is a sizing tool that translates electrical and thermal design requirements into physical PCB routing dimensions. Unlike signal traces—where width is governed primarily by controlled characteristic impedance ($Z_0$, calculated using an \u003Ca href=\"/en/tools/impedance-calculator/\">impedance calculator\u003C/a>)—power rails, motor drives, battery circuits, and converter outputs are governed by \u003Cstrong>current-carrying capacity\u003C/strong> and thermal equilibrium.\u003C/p>\n\u003Cp>Thermal equilibrium is reached when the rate of resistive heat generation matches the rate of heat dissipation to the surrounding air, the dielectric substrate, and adjacent copper planes. A reliable \u003Cstrong>pcb width trace calculator\u003C/strong> evaluates four primary variables:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cstrong>Target Continuous Current ($I$)\u003C/strong>: The root-mean-square (RMS) or continuous DC current in amperes.\u003C/li>\n\u003Cli>\u003Cstrong>Allowable Temperature Rise ($\\Delta T$)\u003C/strong>: The permissible conductor temperature increase above ambient operating temperature (typically 10°C to 20°C for commercial and industrial electronics).\u003C/li>\n\u003Cli>\u003Cstrong>Copper Foil Thickness ($T$)\u003C/strong>: The finished copper weight, commonly 0.5 oz (18 µm), 1 oz (35 µm), or 2 oz (70 µm).\u003C/li>\n\u003Cli>\u003Cstrong>Layer Boundary Condition\u003C/strong>: Whether the conductor is on an \u003Cstrong>external surface layer\u003C/strong> (where convection and radiation shed heat efficiently) or embedded on an \u003Cstrong>internal layer\u003C/strong> (where thermal conductivity is constrained by the dielectric prepreg and core).\u003C/li>\n\u003C/ul>\n\u003Ch2>How Do You Calculate PCB Trace Width? (IPC-2152 vs IPC-2221 Standards)\u003C/h2>\n\u003Cp>Historically, PCB designers relied exclusively on \u003Cstrong>IPC-2221\u003C/strong> (derived from legacy charts in IPC-D-275 dating back to the 1950s). In 2009, the industry introduced \u003Cstrong>IPC-2152\u003C/strong> (\u003Cem>Standard for Determining Current-Carrying Capacity in Printed Board Design\u003C/em>), which established an empirically measured thermal database accounting for modern multi-layer constructions, board thickness, and copper plane thermal coupling.\u003C/p>\n\u003Ch3>The Classical IPC-2221 Calculation Formula\u003C/h3>\n\u003Cp>The classical IPC-2221 formula calculates the required conductor cross-sectional area ($A$) in square mils ($\text{mil}^2$):\u003C/p>\n\u003Cp>$$A = \\left(\nrac{I}{k \\cdot \\Delta T^b}\night)^{\nrac{1}{c}}$$\u003C/p>\n\u003Cp>Where the empirical constants are defined as:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cstrong>For External Layers\u003C/strong>: $k = 0.048$, $b = 0.44$, $c = 0.725$\u003C/li>\n\u003Cli>\u003Cstrong>For Internal Layers\u003C/strong>: $k = 0.024$, $b = 0.44$, $c = 0.725$\u003C/li>\n\u003C/ul>\n\u003Cp>Once cross-sectional area $A$ is determined, the minimum trace width ($W$) in mils is calculated from the copper thickness ($T$, where 1 oz copper $\u0007pprox 1.378\text{ mil}$):\u003C/p>\n\u003Cp>$$W =\nrac{A}{T \\cdot 1.378}$$\u003C/p>\n\u003Cp>Because $k$ for internal layers is half that of external layers ($0.024$ vs $0.048$), \u003Cstrong>an internal trace requires roughly double the cross-sectional area of an external trace\u003C/strong> to carry the identical current at the same allowable temperature rise.\u003C/p>\n\u003Ch3>How IPC-2152 Improves on IPC-2221\u003C/h3>\n\u003Cp>IPC-2221 assumes an isolated conductor in still air on a standard 1.6 mm board with no adjacent copper planes, making its predictions conservative for boards with internal ground planes and overly optimistic for thin uncoupled boards. IPC-2152 incorporates:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cstrong>Thermal spreading of internal copper planes\u003C/strong>: A nearby ground plane absorbs trace heat, effectively reducing required trace width by 15% to 30%.\u003C/li>\n\u003Cli>\u003Cstrong>Board thickness effects\u003C/strong>: Thicker laminate substrates act as a thermal heatsink.\u003C/li>\n\u003Cli>\u003Cstrong>Environmental conditions\u003C/strong>: Explicitly separating vacuum, still air, and forced convection environments.\u003C/li>\n\u003C/ul>\n\u003Ch2>Trace Width vs Current: External and Internal Layer Reference Table\u003C/h2>\n\u003Cp>The lookup table below outlines minimum trace widths calculated per IPC standards for standard temperature rises ($\\Delta T = 10^\\circ\text{C}$ and $20^\\circ\text{C}$) on 1 oz (35 µm) and 2 oz (70 µm) copper:\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Current (A)\u003C/th>\n\u003Cth>Layer Type\u003C/th>\n\u003Cth>Copper Weight\u003C/th>\n\u003Cth>Width for $\\Delta T = 10^\\circ\text{C}$ (mil / mm)\u003C/th>\n\u003Cth>Width for $\\Delta T = 20^\\circ\text{C}$ (mil / mm)\u003C/th>\n\u003Cth>Resistance ($m\\Omega/\text{cm}$)\u003C/th>\n\u003Cth>Voltage Drop / 10 cm\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>\u003Cstrong>1.0 A\u003C/strong>\u003C/td>\n\u003Ctd>External\u003C/td>\n\u003Ctd>1 oz (35 µm)\u003C/td>\n\u003Ctd>11.8 mil (0.30 mm)\u003C/td>\n\u003Ctd>7.4 mil (0.19 mm)\u003C/td>\n\u003Ctd>16.3 $m\\Omega$\u003C/td>\n\u003Ctd>0.016 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>1.0 A\u003C/strong>\u003C/td>\n\u003Ctd>Internal\u003C/td>\n\u003Ctd>1 oz (35 µm)\u003C/td>\n\u003Ctd>30.6 mil (0.78 mm)\u003C/td>\n\u003Ctd>19.1 mil (0.49 mm)\u003C/td>\n\u003Ctd>6.3 $m\\Omega$\u003C/td>\n\u003Ctd>0.006 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>2.0 A\u003C/strong>\u003C/td>\n\u003Ctd>External\u003C/td>\n\u003Ctd>1 oz (35 µm)\u003C/td>\n\u003Ctd>30.6 mil (0.78 mm)\u003C/td>\n\u003Ctd>19.1 mil (0.49 mm)\u003C/td>\n\u003Ctd>6.3 $m\\Omega$\u003C/td>\n\u003Ctd>0.013 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>2.0 A\u003C/strong>\u003C/td>\n\u003Ctd>Internal\u003C/td>\n\u003Ctd>1 oz (35 µm)\u003C/td>\n\u003Ctd>79.5 mil (2.02 mm)\u003C/td>\n\u003Ctd>49.7 mil (1.26 mm)\u003C/td>\n\u003Ctd>2.4 $m\\Omega$\u003C/td>\n\u003Ctd>0.005 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>3.0 A\u003C/strong>\u003C/td>\n\u003Ctd>External\u003C/td>\n\u003Ctd>1 oz (35 µm)\u003C/td>\n\u003Ctd>52.8 mil (1.34 mm)\u003C/td>\n\u003Ctd>33.0 mil (0.84 mm)\u003C/td>\n\u003Ctd>3.6 $m\\Omega$\u003C/td>\n\u003Ctd>0.011 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>3.0 A\u003C/strong>\u003C/td>\n\u003Ctd>External\u003C/td>\n\u003Ctd>2 oz (70 µm)\u003C/td>\n\u003Ctd>26.4 mil (0.67 mm)\u003C/td>\n\u003Ctd>16.5 mil (0.42 mm)\u003C/td>\n\u003Ctd>3.6 $m\\Omega$\u003C/td>\n\u003Ctd>0.011 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>5.0 A\u003C/strong>\u003C/td>\n\u003Ctd>External\u003C/td>\n\u003Ctd>1 oz (35 µm)\u003C/td>\n\u003Ctd>104.6 mil (2.66 mm)\u003C/td>\n\u003Ctd>65.4 mil (1.66 mm)\u003C/td>\n\u003Ctd>1.8 $m\\Omega$\u003C/td>\n\u003Ctd>0.009 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>5.0 A\u003C/strong>\u003C/td>\n\u003Ctd>External\u003C/td>\n\u003Ctd>2 oz (70 µm)\u003C/td>\n\u003Ctd>52.3 mil (1.33 mm)\u003C/td>\n\u003Ctd>32.7 mil (0.83 mm)\u003C/td>\n\u003Ctd>1.8 $m\\Omega$\u003C/td>\n\u003Ctd>0.009 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>5.0 A\u003C/strong>\u003C/td>\n\u003Ctd>Internal\u003C/td>\n\u003Ctd>2 oz (70 µm)\u003C/td>\n\u003Ctd>136.0 mil (3.45 mm)\u003C/td>\n\u003Ctd>85.0 mil (2.16 mm)\u003C/td>\n\u003Ctd>0.7 $m\\Omega$\u003C/td>\n\u003Ctd>0.004 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>10.0 A\u003C/strong>\u003C/td>\n\u003Ctd>External\u003C/td>\n\u003Ctd>2 oz (70 µm)\u003C/td>\n\u003Ctd>136.1 mil (3.46 mm)\u003C/td>\n\u003Ctd>85.1 mil (2.16 mm)\u003C/td>\n\u003Ctd>0.7 $m\\Omega$\u003C/td>\n\u003Ctd>0.007 V\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>10.0 A\u003C/strong>\u003C/td>\n\u003Ctd>Internal\u003C/td>\n\u003Ctd>2 oz (70 µm)\u003C/td>\n\u003Ctd>353.9 mil (8.99 mm)\u003C/td>\n\u003Ctd>221.2 mil (5.62 mm)\u003C/td>\n\u003Ctd>0.3 $m\\Omega$\u003C/td>\n\u003Ctd>0.003 V\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Ch2>Worked Engineering Examples\u003C/h2>\n\u003Ch3>Example 1: 1.5 A Sensor Rail on 1 oz External Layer\u003C/h3>\n\u003Cul>\n\u003Cli>\u003Cstrong>Input Parameters\u003C/strong>: $I = 1.5\text{ A}$, $\\Delta T = 10^\\circ\text{C}$, $T = 1\text{ oz}$ ($1.378\text{ mil}$), External layer ($k = 0.048$).\u003C/li>\n\u003Cli>\u003Cstrong>Calculation\u003C/strong>:\n$$A = \\left(\nrac{1.5}{0.048 \\cdot 10^{0.44}}\night)^{\nrac{1}{0.725}} = \\left(\nrac{1.5}{0.132}\night)^{1.379} = 11.36^{1.379} \u0007pprox 28.9\text{ mil}^2$$\n$$W =\nrac{28.9}{1.378} \u0007pprox 20.97\text{ mil} \u0007pprox 0.53\text{ mm}$$\u003C/li>\n\u003Cli>\u003Cstrong>Design Decision\u003C/strong>: Route with a standard 22 mil or 25 mil trace width to provide comfortable manufacturing tolerance.\u003C/li>\n\u003C/ul>\n\u003Ch3>Example 2: 5 A DC-DC Converter Output on 2 oz Internal Layer\u003C/h3>\n\u003Cul>\n\u003Cli>\u003Cstrong>Input Parameters\u003C/strong>: $I = 5.0\text{ A}$, $\\Delta T = 20^\\circ\text{C}$, $T = 2\text{ oz}$ ($2.756\text{ mil}$), Internal layer ($k = 0.024$).\u003C/li>\n\u003Cli>\u003Cstrong>Calculation\u003C/strong>:\n$$A = \\left(\nrac{5.0}{0.024 \\cdot 20^{0.44}}\night)^{\nrac{1}{0.725}} = \\left(\nrac{5.0}{0.090}\night)^{1.379} = 55.5^{1.379} \u0007pprox 234.3\text{ mil}^2$$\n$$W =\nrac{234.3}{2.756} \u0007pprox 85.0\text{ mil} \u0007pprox 2.16\text{ mm}$$\u003C/li>\n\u003Cli>\u003Cstrong>Design Decision\u003C/strong>: Routing an 85 mil (2.16 mm) trace on an inner layer consumes significant routing channels. In practice, replace discrete traces with a dedicated polygon pour or split the current across parallel layers stitched with thermal vias.\u003C/li>\n\u003C/ul>\n\u003Ch2>Common Trace Width Sizing Mistakes to Avoid\u003C/h2>\n\u003Col>\n\u003Cli>\u003Cstrong>Treating Internal and External Layers Equivalently\u003C/strong>: Applying external current charts to internal layers results in conductors running 30°C to 50°C hotter than anticipated, risking localized laminate delamination.\u003C/li>\n\u003Cli>\u003Cstrong>Ignoring Etch Factor and Copper Thickness Tolerances\u003C/strong>: Standard 1 oz foil typically measures 30 µm to 33 µm after plating and chemical cleaning, and chemical etching introduces trapezoidal undercut. Add at least a 10% to 15% width margin over theoretical calculations.\u003C/li>\n\u003Cli>\u003Cstrong>Overlooking DC Resistance and Voltage Drop\u003C/strong>: A trace may operate safely within thermal limits while dropping excessive voltage along a 20 cm run. Always calculate $V_{\text{drop}} = I \\cdot R$ to ensure power rail regulation remains within IC tolerances.\u003C/li>\n\u003Cli>\u003Cstrong>Paralleling Traces Without Proper Thermal Stitching\u003C/strong>: Routing parallel conductors across top and bottom layers without stitching vias causes unequal current sharing if via impedances differ.\u003C/li>\n\u003C/ol>\n\u003Ch2>When to Transition to Heavy Copper and Busbars\u003C/h2>\n\u003Cp>When a calculated trace width exceeds 150 to 200 mils (3.8 mm to 5.0 mm), discrete surface traces become impractical. Consider these manufacturing alternatives:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cstrong>Heavy Copper PCBs (3 oz to 10 oz)\u003C/strong>: Thick copper conductors allow high current densities within manageable track widths, as outlined in our \u003Ca href=\"/en/blog/thick-copper-pcb/\">thick copper PCB overview\u003C/a> and \u003Ca href=\"/en/products/heavy-copper-pcb/\">heavy copper manufacturing service\u003C/a>.\u003C/li>\n\u003Cli>\u003Cstrong>Embedded Copper Busbars\u003C/strong>: Solder-bonded copper busbars or press-fit bus elements carry currents above 50 A directly on the board.\u003C/li>\n\u003Cli>\u003Cstrong>Top and Bottom Polygon Pours\u003C/strong>: Pouring solid copper planes on multiple layers connected by dense via arrays.\u003C/li>\n\u003C/ul>\n\u003Cp>For complete layout and DFM guidance, see our \u003Ca href=\"/en/blog/circuit-board-design/\">circuit board design guide\u003C/a> and \u003Ca href=\"/en/blog/ipc-2221-pcb/\">IPC-2221 design standard overview\u003C/a>.\u003C/p>\n\u003Chr>\n\u003Ch2>Frequently Asked Questions (FAQ)\u003C/h2>\n\u003Ch3>How wide should a PCB trace be for 1A?\u003C/h3>\n\u003Cp>For 1A of current on a standard 1 oz external layer with an allowable temperature rise of 10°C, the minimum recommended trace width is approximately 12 mil (0.3 mm). On an internal layer, the width should be increased to approximately 30 mil (0.78 mm).\u003C/p>\n\u003Ch3>What is the difference between IPC-2152 and IPC-2221 for trace width?\u003C/h3>\n\u003Cp>IPC-2221 relies on legacy charts of isolated traces in air, yielding conservative values. IPC-2152 is based on empirical thermal measurements that account for board thickness, heat dissipation through adjacent copper ground planes, and air versus vacuum environments.\u003C/p>\n\u003Ch3>Does copper thickness change required trace width?\u003C/h3>\n\u003Cp>Yes. Trace current capacity is governed by cross-sectional area (thickness × width). Increasing copper weight from 1 oz (35 µm) to 2 oz (70 µm) halves the trace width needed to carry the same current at the same temperature rise.\u003C/p>\n\u003Ch3>Can the same trace carry power and signal?\u003C/h3>\n\u003Cp>Power traces require substantial width for low DC resistance and thermal control, whereas high-speed signal traces require precise narrow geometries to maintain 50Ω or 100Ω impedance. Power and signal routing must be kept separate.\u003C/p>\n\u003Ch3>What is a PCB trace size calculator?\u003C/h3>\n\u003Cp>A PCB trace size calculator is an engineering tool that uses thermal standards (IPC-2152 / IPC-2221) to determine the exact conductor width and copper weight required for a given current load and board layer stackup.\u003C/p>\n\u003Chr>\n\u003Ch2>Manufacture High-Current PCBs with HILPCB\u003C/h2>\n\u003Cp>HILPCB delivers precision fabrication and comprehensive engineering validation for high-current and multi-layer boards:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cstrong>Full Copper Weight Capabilities\u003C/strong>: From standard 1 oz/2 oz commercial builds to heavy copper (3 oz to 10 oz+) power platforms.\u003C/li>\n\u003Cli>\u003Cstrong>Accurate Layer Stackup Verification\u003C/strong>: Pre-production DFM engineering to verify conductor geometries, thermal relief, and drill clearances.\u003C/li>\n\u003Cli>\u003Cstrong>Certified Quality Systems\u003C/strong>: 100% electrical continuity testing and microsection cross-sectioning to verify finished copper thicknesses.\u003C/li>\n\u003C/ul>\n\u003Cp>Submit your design files through our \u003Ca href=\"/en/pcb-manufacturing/\">PCB manufacturing service\u003C/a> to receive a verified DFM engineering review and competitive quotation.\u003C/p>\n\u003Cp>Specifying standard 1 oz copper rather than 3 oz whenever electrical ampacity allows prevents excessive copper etching charges and reduces unit \u003Ca href=\"/en/blog/pcb-cost/\">pcb board price\u003C/a>.\u003C/p>\n\n\u003Csection class=\"related-links\" aria-label=\"Related\">\u003Ch3>Related links\u003C/h3>\u003Cul>\u003Cli>\u003Ca href=\"/en/tools/impedance-calculator/\">impedance calculator\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/thick-copper-pcb/\">Thick Copper PCB Design – High-Current Power PCB Manufacturing Guide\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/products/heavy-copper-pcb/\">heavy copper manufacturing service\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/circuit-board-design/\">PCB Design (Circuit Board Design) Guide: Engineering Workflow, DFM and Stackup Strategy\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/ipc-2221-pcb/\">IPC-2221 PCB Design Standards: Complete Guide to Generic Design Requirements\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/pcb-manufacturing/\">PCB manufacturing service\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/pcb-cost/\">PCB Cost Analysis: How to Calculate and Reduce Your Manufacturing Expenses\u003C/a>\u003C/li>\u003C/ul>\u003C/section>",[],[15,16,17,18,19,20,21],"trace width calculator","pcb trace width calculator","IPC-2152","IPC-2221","pcb current calculator","trace width calc","PCB design","pcb-trace-width-calculator","en",{"blog":25,"breadcrumb":34},{"@context":26,"@type":27,"headline":4,"description":5,"image":8,"url":28,"datePublished":6,"dateModified":6,"timeRequired":11,"keywords":29,"articleSection":7,"author":30,"publisher":33},"https://schema.org","BlogPosting","https://hilpcb.com/en/blog/pcb-trace-width-calculator/","trace width calculator, pcb trace width calculator, IPC-2152, IPC-2221, pcb current calculator, trace width calc, PCB design",{"@type":31,"name":32},"Organization","HILPCB",{"@type":31,"name":32},{"@context":26,"@type":35,"itemListElement":36},"BreadcrumbList",[37,42,46],{"@type":38,"position":39,"name":40,"item":41},"ListItem",1,"Home","https://hilpcb.com/",{"@type":38,"position":43,"name":44,"item":45},2,"Blog","https://hilpcb.com/en/blog/",{"@type":38,"position":47,"name":22,"item":28},3,1791623033726]