[{"data":1,"prerenderedAt":64},["ShallowReactive",2],{"blog-pcb-finished-hole-size-drill-tolerance-it":3},{"title":4,"description":5,"date":6,"lastUpdated":6,"category":7,"image":8,"readingTime":9,"wordCount":10,"timeRequired":11,"htmlContent":12,"faq":13,"tags":28,"slug":33,"sourceLocale":34,"availableLocales":35,"jsonld":40},"Finished Hole Size vs Drill Size: Writing Clear PCB Hole Requirements","Specify finished hole size (FHS) and tolerances separately from production drill bit diameters. Calculate round-pin, rectangular-lead, and press-fit hole clearances.","2026-10-29","technology","/assets/blogs/pcb-finished-hole-size-drill-tolerance/hole-deposit-and-fit.svg",11,2165,"PT11M","\u003Cp>For a through-hole connector pin, press-fit terminal, or mechanical mounting fastener, the only diameter that matters on the assembly line is the \u003Cstrong>Finished Hole Size (FHS)\u003C/strong>—the clear internal opening remaining after fabrication is complete. The \u003Cstrong>Drill Size (\u003Cspan class=\"math-inline\">D\u003Csub>drill\u003C/sub>\u003C/span>)\u003C/strong> is an upstream manufacturing tool choice that the PCB fabricator selects to account for laminate resin movement, electroless copper seed, electrolytic barrel copper plating, and final surface finish.\u003C/p>\n\u003Cp>When a designer exports an Excellon drill file without stating whether the numbers represent \u003Cstrong>finished hole diameters\u003C/strong> or \u003Cstrong>raw drill tool diameters\u003C/strong>—or applies a generic \u003Cspan class=\"math-inline\">+0.10 mm\u003C/span> plating offset to a compliant press-fit connector—either the fabricator over-compensates twice (producing oversized holes with weak solder fillets) or under-compensates (producing tight holes that bind component pins on the assembly line).\u003C/p>\n\u003Cp>\u003Cimg src=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/hole-deposit-and-fit.svg\" alt=\"Plated through-hole wall deposit geometry and component pin-to-hole clearance stackup\">\u003C/p>\n\u003Ch2>1. From Drilled Bore to Finished Opening: The PTH Wall Stackup\u003C/h2>\n\u003Cp>When a plated through-hole (PTH) is fabricated, the mechanical drill bit cuts an initial bore of diameter \u003Cspan class=\"math-inline\">D\u003Csub>drill\u003C/sub>\u003C/span> through the copper-clad laminate. Subsequent wet-chemical and electroplating steps build metallic layers inward from the hole wall, reducing the clear opening by twice the total wall deposit thickness (\u003Cspan class=\"math-inline\">2t\u003C/span>):\u003C/p>\n\u003Cdiv class=\"math-block\">D\u003Csub>FHS\u003C/sub> ≈ D\u003Csub>drill\u003C/sub> - 2 × (t\u003Csub>electroless\u003C/sub> + t\u003Csub>barrel Cu\u003C/sub> + t\u003Csub>finish\u003C/sub>)\u003C/div>\n\n\u003Cp>As documented in \u003Ca href=\"https://www.molex.com/content/dam/molex/molex-dot-com/products/automated/en-us/productspecificationpdf/464/46436/PS-46436-100-001.pdf\">Molex's Ten60 Power Product Specification PS-46436-100 (Revision E8, Section 7.1)\u003C/a> and published fabricator galvanic guidance, different fabricators and board constructions require different drill tool compensations to hit the exact same finished hole size:\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Wall Layer / Process Factor\u003C/th>\n\u003Cth>Typical Per-Wall Contribution\u003C/th>\n\u003Cth>Why a Single "Universal Drill Offset" Fails Across Suppliers\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>\u003Cstrong>Electroless Copper + Electrolytic Barrel Copper\u003C/strong>\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">20--35 μm\u003C/span> per wall (\u003Cspan class=\"math-inline\">0.04--0.07 mm\u003C/span> on diameter)\u003C/td>\n\u003Ctd>IPC-6012 Class 3, heavy-copper builds, or high-aspect-ratio boards require thicker barrel plating than standard Class 2 prototypes\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>Surface Finish Deposit\u003C/strong>\u003C/td>\n\u003Ctd>ENIG /OSP / Imm. Ag: \u003Cspan class=\"math-inline\"><1--5 μm\u003C/span> per wall;\u003Cbr>HASL: \u003Cspan class=\"math-inline\">10--40+ μm\u003C/span> uneven meniscus\u003C/td>\n\u003Ctd>Hot Air Solder Leveling (HASL) coats hole walls with a thicker, less uniform solder meniscus than planar chemical finishes like ENIG\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>Laminate Elastic Recovery (Hole Shrinkage)\u003C/strong>\u003C/td>\n\u003Ctd>Material- and drill-speed dependent (\u003Cspan class=\"math-inline\">10--30 μm\u003C/span>)\u003C/td>\n\u003Ctd>FR-4, high-\u003Cspan class=\"math-inline\">T\u003Csub>g\u003C/sub>\u003C/span> epoxy, and PTFE/ceramic laminates relax differently after the carbide drill bit exits the bore\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>Plating Current Distribution ("Dog-Boning")\u003C/strong>\u003C/td>\n\u003Ctd>Thicker plating at hole knee/entrance than at barrel center\u003C/td>\n\u003Ctd>High-aspect-ratio holes plate faster at the top/bottom openings than at mid-depth, creating a waisted bore profile\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Ch3>Worked Deposit Geometry: Concentric vs. Asymmetric Wall Plating\u003C/h3>\n\u003Cp>In an idealized concentric model (\u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/plating-geometry-example.csv\">plating-geometry-example.csv\u003C/a>), if CAM selects a \u003Cspan class=\"math-inline\">0.90 mm\u003C/span> drill tool and the process deposits a uniform \u003Cspan class=\"math-inline\">t = 0.05 mm\u003C/span> (\u003Cspan class=\"math-inline\">50 μm\u003C/span>) total layer on each wall, the finished hole diameter is:\u003C/p>\n\u003Cdiv class=\"math-block\">D\u003Csub>FHS\u003C/sub> = 0.90 mm - 2(0.05 mm) = 0.80 mm\u003C/div>\n\n\u003Cp>However, if local plating distribution or drill runout deposits \u003Cspan class=\"math-inline\">0.04 mm\u003C/span> on the left wall and \u003Cspan class=\"math-inline\">0.06 mm\u003C/span> on the right wall, a caliper or pin gauge still reads \u003Cspan class=\"math-inline\">0.90 - (0.04 + 0.06) = 0.80 mm\u003C/span>, yet the finished bore centerline has shifted laterally, and axial hourglassing between the hole knee and center can still bind a tight-fitting pin. This is why \u003Cstrong>the designer should specify the required Finished Hole Size and tolerance (\u003Cspan class=\"math-inline\">D\u003Csub>FHS\u003C/sub> ± tol\u003C/span>)\u003C/strong>, leaving drill bit selection to the fabricator's qualified CAM compensation tables.\u003C/p>\n\u003Ch2>2. Sizing Soldered Through-Holes: Round Pins vs. Rectangular Leads\u003C/h2>\n\u003Cp>For wave-soldered, selective-soldered, or hand-soldered through-hole components, the finished hole must be large enough for automated/manual pin insertion across worst-case lead and hole tolerances, yet narrow enough for capillary action to draw molten solder up to the top-side land (typically \u003Cspan class=\"math-inline\">0.15--0.40 mm\u003C/span> diametral clearance depending on board thickness and soldering method).\u003C/p>\n\u003Ch3>Case A: Round Component Lead Tolerance Stackup\u003C/h3>\n\u003Cp>Always compute minimum and maximum diametral clearance from the \u003Cstrong>extreme limit dimensions\u003C/strong>, never from nominal values alone:\u003C/p>\n\u003Cdiv class=\"math-block\">Clearance\u003Csub>\\min\u003C/sub> = D\u003Csub>FHS,min\u003C/sub> - d\u003Csub>pin,max\u003C/sub>,   Clearance\u003Csub>\\max\u003C/sub> = D\u003Csub>FHS,max\u003C/sub> - d\u003Csub>pin,min\u003C/sub>\u003C/div>\n\n\u003Cp>Suppose a round component lead has a specified diameter of \u003Cspan class=\"math-inline\">0.58 ± 0.02 mm\u003C/span> (\u003Cspan class=\"math-inline\">0.56--0.60 mm\u003C/span>) and your assembly process requires at least \u003Cspan class=\"math-inline\">0.12 mm\u003C/span> minimum diametral clearance for reliable insertion and solder fill (\u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/fit-tolerance-example.csv\">fit-tolerance-example.csv\u003C/a>):\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Candidate Hole Specification\u003C/th>\n\u003Cth>Finished Hole Range (\u003Cspan class=\"math-inline\">D\u003Csub>FHS\u003C/sub>\u003C/span>)\u003C/th>\n\u003Cth>Min Diametral Clearance (\u003Cspan class=\"math-inline\">D\u003Csub>FHS,min\u003C/sub> - 0.60\u003C/span>)\u003C/th>\n\u003Cth>Max Diametral Clearance (\u003Cspan class=\"math-inline\">D\u003Csub>FHS,max\u003C/sub> - 0.56\u003C/span>)\u003C/th>\n\u003Cth>Engineering Verdict\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>\u003Cstrong>Candidate 1 (Baseline): \u003Ccode>0.80 ± 0.05 mm\u003C/code>\u003C/strong>\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">0.75--0.85 mm\u003C/span>\u003C/td>\n\u003Ctd>\u003Cstrong>\u003Cspan class=\"math-inline\">0.15 mm\u003C/span>\u003C/strong> (\u003Cspan class=\"math-inline\">0.75 - 0.60\u003C/span>)\u003C/td>\n\u003Ctd>\u003Cstrong>\u003Cspan class=\"math-inline\">0.29 mm\u003C/span>\u003C/strong> (\u003Cspan class=\"math-inline\">0.85 - 0.56\u003C/span>)\u003C/td>\n\u003Ctd>\u003Cstrong>PASS\u003C/strong> — Exceeds \u003Cspan class=\"math-inline\">0.12 mm\u003C/span> minimum by \u003Cspan class=\"math-inline\">+0.03 mm\u003C/span> while keeping max gap \u003Cspan class=\"math-inline\">≤ 0.30 mm\u003C/span>\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>Candidate 2 (Tighter Alternate): \u003Ccode>0.73 ± 0.05 mm\u003C/code>\u003C/strong>\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">0.68--0.78 mm\u003C/span>\u003C/td>\n\u003Ctd>\u003Cstrong>\u003Cspan class=\"math-inline\">0.08 mm\u003C/span>\u003C/strong> (\u003Cspan class=\"math-inline\">0.68 - 0.60\u003C/span>)\u003C/td>\n\u003Ctd>\u003Cstrong>\u003Cspan class=\"math-inline\">0.22 mm\u003C/span>\u003C/strong> (\u003Cspan class=\"math-inline\">0.78 - 0.56\u003C/span>)\u003C/td>\n\u003Ctd>\u003Cstrong>REJECT\u003C/strong> — Nominal \u003Cspan class=\"math-inline\">0.73 - 0.58 = 0.15 mm\u003C/span> looks fine, but worst-case drops to \u003Cspan class=\"math-inline\">0.08 mm\u003C/span>\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>Note that this calculation covers \u003Cstrong>single-pin diametral size only\u003C/strong>. On a multi-pin header or shrouded connector, positional true-position tolerance (\u003Cspan class=\"math-inline\">GD&T  \\varnothing t\u003C/span>) across the pin array and lead-tip true position also consume insertion clearance.\u003C/p>\n\u003Ch3>Case B: Rectangular and Square Pins (The Diagonal Rule)\u003C/h3>\n\u003Cp>A classic layout mistake is sizing a PTH from the flat width (\u003Cspan class=\"math-inline\">W\u003C/span>) of a square or rectangular header pin. A square \u003Cspan class=\"math-inline\">0.64 × 0.64 mm\u003C/span> (\u003Cspan class=\"math-inline\">0.025 in\u003C/span>) header post touches the circular hole wall at its \u003Cstrong>four corners\u003C/strong>, not its flat faces. Always calculate the maximum pin diameter from the \u003Cstrong>maximum cross-sectional diagonal\u003C/strong> including lead tolerances:\u003C/p>\n\u003Cdiv class=\"math-block\">d\u003Csub>pin,max\u003C/sub> = √W\u003Csub>\\max\u003C/sub>\u003Csup>2\u003C/sup> + T\u003Csub>\\max\u003C/sub>\u003Csup>2\u003C/sup>\u003C/div>\n\n\u003Cp>For a \u003Cspan class=\"math-inline\">0.64 ± 0.02 mm\u003C/span> square pin (\u003Cspan class=\"math-inline\">W\u003Csub>\\max\u003C/sub> = T\u003Csub>\\max\u003C/sub> = 0.66 mm\u003C/span>), the corner diagonal is \u003Cspan class=\"math-inline\">√0.66\u003Csup>2\u003C/sup> + 0.66\u003Csup>2\u003C/sup> = 0.933 mm\u003C/span>—meaning a \u003Cspan class=\"math-inline\">0.80 mm\u003C/span> finished hole that easily accepts a \u003Cspan class=\"math-inline\">0.60 mm\u003C/span> round lead will physically jam on a \u003Cspan class=\"math-inline\">0.64 mm\u003C/span> square post.\u003C/p>\n\u003Ch2>3. Why Press-Fit (Compliant-Pin) Holes Cannot Use Solder-Clearance Math\u003C/h2>\n\u003Cp>Compliant press-fit pins (such as eye-of-the-needle or C-section terminals used in high-current power modules, automotive ECUs, and telecom backplanes) form a gas-tight cold weld through \u003Cstrong>controlled radial interference\u003C/strong> between the elastic pin zone and the plated hole barrel. Applying a positive solder-clearance formula to a press-fit pin results in zero retention force and immediate electrical open failure.\u003C/p>\n\u003Cp>As detailed in \u003Ca href=\"https://suddendocs.samtec.com/notesandwhitepapers/samtec-compliant-pin-termination-specification.pdf\">Samtec's Compliant Pin Termination Specification\u003C/a> and \u003Ca href=\"https://www.molex.com/content/dam/molex/molex-dot-com/products/automated/en-us/productspecificationpdf/464/46436/PS-46436-100-001.pdf\">Molex's Ten60 Power Specification PS-46436-100\u003C/a>, a press-fit hole specification must lock four interdependent parameters directly from the connector manufacturer's print:\u003C/p>\n\u003Col>\n\u003Cli>\u003Cstrong>Exact Reference Drill and Finished Hole Tolerance:\u003C/strong> Press-fit PTH tolerances are typically much tighter than soldered PTHs (commonly \u003Cspan class=\"math-inline\">± 0.05 mm\u003C/span> or \u003Cspan class=\"math-inline\">+0.05/-0.025 mm\u003C/span> on FHS, often paired with a mandated reference drill bit size such as \u003Cspan class=\"math-inline\">1.15 mm\u003C/span> drill for a \u003Cspan class=\"math-inline\">1.00 ± 0.05 mm\u003C/span> finished hole).\u003C/li>\n\u003Cli>\u003Cstrong>Copper Plating and Surface Finish Window:\u003C/strong> Too little barrel copper risks tearing the barrel wall during pin insertion; too much copper or a thick, uneven HASL finish increases insertion force and shears tin slivers. Planar finishes (such as Immersion Tin, ENIG, or OSP as specified by the connector datasheet) are typically required.\u003C/li>\n\u003Cli>\u003Cstrong>Bore Cylindricity Through the Compliant Engagement Zone:\u003C/strong> In thick backplanes, excessive "hourglassing" (barrel plating thicker at the surface than in the compliant engagement depth) alters radial contact pressure.\u003C/li>\n\u003Cli>\u003Cstrong>Minimum Board Thickness and Support Tooling:\u003C/strong> Ensure the PCB stackup meets the connector's minimum engagement thickness and that annular rings on outer/inner layers are sized for the specified press-fit drill diameter.\u003C/li>\n\u003C/ol>\n\u003Ch2>4. Specifying Plated Slots, NPTH Mounting Holes, and Master Hole Tables\u003C/h2>\n\u003Cp>Ambiguity in fabrication packages occurs most often on \u003Cstrong>non-circular slots\u003C/strong> and \u003Cstrong>non-plated through-holes (NPTH)\u003C/strong>. Our downloadable master hole worksheet (\u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/filled-hole-requirements.csv\">filled-hole-requirements.csv\u003C/a>) illustrates how to document four distinct hole families—including explicit holds where engineering data is incomplete:\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Feature / Callout\u003C/th>\n\u003Cth>Hole Type & Plating\u003C/th>\n\u003Cth>Functional Interface\u003C/th>\n\u003Cth>Finished Dimension & Tolerance\u003C/th>\n\u003Cth>Positional / Datum Basis\u003C/th>\n\u003Cth>Current Engineering Status\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>\u003Cstrong>\u003Ccode>H01\u003C/code> (\u003Ccode>J1\u003C/code>)\u003C/strong>\u003C/td>\n\u003Ctd>Round PTH (Plated)\u003C/td>\n\u003Ctd>Round soldered connector lead (\u003Cspan class=\"math-inline\">0.56--0.60 mm\u003C/span>)\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">\\varnothing 0.80 ± 0.05 mm\u003C/span> FHS\u003C/td>\n\u003Ctd>Referenced to Datum A/B (\u003Ccode>DEMO-MECH-B\u003C/code>)\u003C/td>\n\u003Ctd>\u003Cstrong>Size Verified\u003C/strong> (\u003Cspan class=\"math-inline\">0.15--0.29 mm\u003C/span> gap); confirm positional tolerance\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>\u003Ccode>H02\u003C/code>\u003C/strong>\u003C/td>\n\u003Ctd>Round NPTH (Non-Plated)\u003C/td>\n\u003Ctd>Mechanical M3 fastener / locating boss\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">\\varnothing 3.20 +0.10/-0.00 mm\u003C/span> FHS\u003C/td>\n\u003Ctd>Assembly drawing \u003Ccode>DEMO-MECH-B\u003C/code> controls true position\u003C/td>\n\u003Ctd>\u003Cstrong>HOLD\u003C/strong> — Confirm whether hole is loose clearance or precision locating datum\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>\u003Ccode>S01\u003C/code> (\u003Ccode>J2\u003C/code>)\u003C/strong>\u003C/td>\n\u003Ctd>Plated Routed Slot\u003C/td>\n\u003Ctd>Flat power blade terminal\u003C/td>\n\u003Ctd>\u003Cspan class=\"math-inline\">1.20 ± 0.05 mm\u003C/span> wide \u003Cspan class=\"math-inline\">× 2.40 ± 0.10 mm\u003C/span> long FHS\u003C/td>\n\u003Ctd>Slot centerline and orientation per \u003Ccode>DEMO-MECH-B\u003C/code>\u003C/td>\n\u003Ctd>\u003Cstrong>HOLD\u003C/strong> — Exported drill/route file omitted plated status; regenerate \u003Ccode>G85\u003C/code>/route data\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>\u003Cstrong>\u003Ccode>H03\u003C/code> (\u003Ccode>J3\u003C/code>)\u003C/strong>\u003C/td>\n\u003Ctd>Round Press-Fit PTH\u003C/td>\n\u003Ctd>Compliant press-fit connector\u003C/td>\n\u003Ctd>Per specific connector datasheet print\u003C/td>\n\u003Ctd>Connector datum and engagement depth\u003C/td>\n\u003Ctd>\u003Cstrong>HOLD\u003C/strong> — Do not guess diameter; attach exact connector part number and print\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>\u003Cem>(All three worked CSV files: \u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/filled-hole-requirements.csv\">filled-hole-requirements.csv\u003C/a>, \u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/fit-tolerance-example.csv\">fit-tolerance-example.csv\u003C/a>, \u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/plating-geometry-example.csv\">plating-geometry-example.csv\u003C/a>, and \u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/README.md\">notes\u003C/a>.)\u003C/em>\u003C/p>\n\u003Ch3>Critical Rules for Plated Slots (\u003Ccode>S01\u003C/code>) and NPTHs (\u003Ccode>H02\u003C/code>)\u003C/h3>\n\u003Cul>\n\u003Cli>\u003Cstrong>Never represent a rectangular power blade slot as a single oversized round drill hit\u003C/strong> unless the padstack and solder paste volume are explicitly designed for a large circular hole; an oversized circle consumes excessive routing space and requires far more wave/selective solder to fill without blowholes. Export slots on a dedicated slot/route layer or Excellon slot command with explicit width, length, end radii, and PTH/NPTH designation.\u003C/li>\n\u003Cli>\u003Cstrong>Separate PTH and NPTH Excellon files (or verify unambiguous tool headers):\u003C/strong> As noted in published drilled-hole guidelines, incoming drill diameters are interpreted as \u003Cstrong>finished hole sizes\u003C/strong> unless specified otherwise, and merging plated and non-plated holes without clear tool flags forces an immediate CAM hold.\u003C/li>\n\u003Cli>\u003Cstrong>Keep Backdrilling Separate:\u003C/strong> If high-speed connector PTHs require controlled-depth stub removal, specify the stub length and backdrill span separately using our \u003Ca href=\"/it/blog/backdrill-pcb/\">backdrill PCB design guide\u003C/a>.\u003C/li>\n\u003C/ul>\n\u003Ch2>5. Resolving Drawing-vs.-Drill File Conflicts and Submitting Your RFQ\u003C/h2>\n\u003Cp>When a fabrication drawing table calls out \u003Cspan class=\"math-inline\">\\varnothing 0.80 ± 0.05 mm\u003C/span> Finished Hole Size for \u003Ccode>H01\u003C/code> while the exported \u003Ccode>drill.drl\u003C/code> file lists \u003Ccode>0.90 mm\u003C/code> for the same tool code, CAM cannot guess whether \u003Ccode>0.90 mm\u003C/code> was an intentional \u003Cspan class=\"math-inline\">+0.10 mm\u003C/span> designer drill-compensation attempt or a revision mismatch. Resolve the conflict through a formal Engineering Query (EQ), update the master archive so both the drawing and drill header state the same \u003Cstrong>Finished Hole Size (FHS)\u003C/strong> convention, and re-verify annular rings on all layers (see \u003Ca href=\"/it/blog/gerber-data-preparation-pcb-manufacturing-quality/\">Gerber data preparation and EQ control\u003C/a>).\u003C/p>\n\u003Cp>When submitting your \u003Ca href=\"/it/pcb-manufacturing/\">PCB manufacturing\u003C/a> RFQ to HILPCB, include:\u003C/p>\n\u003Col>\n\u003Cli>\u003Cstrong>Master Hole Table on the Fabrication Drawing:\u003C/strong> Listing every tool code, hole count, PTH vs. NPTH status, round vs. slot geometry, and \u003Cstrong>Finished Hole Size (FHS) tolerance\u003C/strong>.\u003C/li>\n\u003Cli>\u003Cstrong>Component Drawings for Fit-Critical & Press-Fit Holes:\u003C/strong> Attach the exact connector manufacturer specification (e.g., Molex, Samtec, TE) for any compliant press-fit or precision alignment hole.\u003C/li>\n\u003Cli>\u003Cstrong>Via Protection & Plugging Callouts:\u003C/strong> Distinguish component PTHs (which must remain open and clear of solder mask encroachment) from interconnect vias that require tenting, resin plugging, or VIPPO copper fill.\u003C/li>\n\u003C/ol>\n\u003Cp>HILPCB fabricates precision \u003Ca href=\"/it/products/multilayer-pcb/\">multilayer PCBs\u003C/a> and \u003Ca href=\"/it/products/hdi-pcb/\">HDI boards\u003C/a> with mechanical drilling down to \u003Cstrong>0.15 mm\u003C/strong>, CNC-routed plated and non-plated slots, controlled-depth backdrilling, and tight press-fit PTH barrel tolerances verified by pin-gauge and metallographic microsection inspection. Upload your Gerber/ODB++ files and hole table when you \u003Ca href=\"/it/quote/\">request a quote\u003C/a> for a complete CAM review.\u003C/p>\n\u003Cdiv data-component=\"BlogQuickQuoteInline\">\u003C/div>\n\n\u003C!-- faq:start -->\n\u003Ch2>Frequently Asked Questions\u003C/h2>\n\u003Ch3>Should my Excellon drill file contain finished hole sizes or compensated drill bit sizes?\u003C/h3>\n\u003Cp>Always export \u003Cstrong>Finished Hole Sizes (FHS)\u003C/strong> in your Excellon drill file and state \u003Ccode>"ALL DRILL SIZES ARE FINISHED HOLE SIZES (FHS)"\u003C/code> in your fabrication drawing notes. Because every PCB factory uses different plating bath thicknesses, laminate scale factors, and surface-finish compensations, pre-adding a manual drill offset in CAD risks double-compensation or under-sized holes.\u003C/p>\n\u003Ch3>How much larger than the component lead should a standard soldered PTH finished hole be?\u003C/h3>\n\u003Cp>For standard round through-hole leads soldered by wave, selective, or hand soldering, designers commonly target a \u003Cstrong>diametral clearance of \u003Cspan class=\"math-inline\">0.15 mm\u003C/span> to \u003Cspan class=\"math-inline\">0.30 mm\u003C/span>\u003C/strong> (\u003Cspan class=\"math-inline\">6--12 mil\u003C/span>) between the maximum pin diameter (or maximum diagonal for square/rectangular pins) and the nominal finished hole size, then verify that worst-case minimum hole minus maximum pin still leaves \u003Cspan class=\"math-inline\">≥ 0.10--0.12 mm\u003C/span> clearance. Always check the component datasheet first.\u003C/p>\n\u003Ch3>Why does HASL surface finish require a different hole tolerance or drill compensation than ENIG?\u003C/h3>\n\u003Cp>Electroless Nickel Immersion Gold (ENIG) deposits a thin, uniform chemical layer (\u003Cspan class=\"math-inline\">≈ 3--6 μm\u003C/span> Ni plus \u003Cspan class=\"math-inline\"><0.1 μm\u003C/span> Au per wall), preserving a cylindrical bore. Hot Air Solder Leveling (HASL) dips the board in molten solder and clears holes with hot air knives, leaving a thicker, slightly barrel-shaped solder coating (\u003Cspan class=\"math-inline\">10--40 μm\u003C/span>) that narrows the effective finished opening and generally requires wider FHS tolerances (e.g., \u003Cspan class=\"math-inline\">± 0.08 mm\u003C/span> vs. \u003Cspan class=\"math-inline\">± 0.05 mm\u003C/span> for ENIG) or a larger starting drill bit.\u003C/p>\n\u003Ch3>Can I shrink a component hole diameter in CAM just to fix an inner-layer annular ring violation?\u003C/h3>\n\u003Cp>Never reduce a component PTH's finished hole diameter to gain annular ring margin without first recalculating the worst-case pin-to-hole clearance against the component's maximum lead diameter or diagonal. If the hole cannot be shrunk without binding the component lead, enlarge the pad (or add teardrops) and verify adjacent trace clearance instead.\u003C/p>\n\u003C!-- faq:end -->\n\u003Csection class=\"related-links\" aria-label=\"Link correlati\">\u003Ch3 id=\"related-links\">Link correlati\u003C/h3>\u003Cul>\u003Cli>\u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/plating-geometry-example.csv\">plating-geometry-example.csv\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/fit-tolerance-example.csv\">fit-tolerance-example.csv\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/filled-hole-requirements.csv\">filled-hole-requirements.csv\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/assets/blogs/pcb-finished-hole-size-drill-tolerance/README.md\">notes\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/it/blog/backdrill-pcb/\">Backdrill PCB: Rimozione degli stub dei via per l'integrità del segnale ad alta velocità\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/it/blog/gerber-data-preparation-pcb-manufacturing-quality/\">Preparazione dei Dati Gerber per una Produzione PCB Affidabile\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/it/pcb-manufacturing/\">PCB manufacturing\u003C/a>\u003C/li>\u003C/ul>\u003C/section>",[14,18,22,25],{"question":15,"answer":16,"answerText":17},"Should my Excellon drill file contain finished hole sizes or compensated drill bit sizes?","Always export **Finished Hole Sizes (FHS)** in your Excellon drill file and state `\"ALL DRILL SIZES ARE FINISHED HOLE SIZES (FHS)\"` in your fabrication drawing notes. Because every PCB factory uses different plating bath thicknesses, laminate scale factors, and surface-finish compensations, pre-adding a manual drill offset in CAD risks double-compensation or under-sized holes.","Always export Finished Hole Sizes (FHS) in your Excellon drill file and state \"ALL DRILL SIZES ARE FINISHED HOLE SIZES (FHS)\" in your fabrication drawing notes. Because every PCB factory uses different plating bath thicknesses, laminate scale factors, and surface-finish compensations, pre-adding a manual drill offset in CAD risks double-compensation or under-sized holes.",{"question":19,"answer":20,"answerText":21},"How much larger than the component lead should a standard soldered PTH finished hole be?","For standard round through-hole leads soldered by wave, selective, or hand soldering, designers commonly target a **diametral clearance of $0.15\\text{ mm}$ to $0.30\\text{ mm}$** ($6\\text{--}12\\text{ mil}$) between the maximum pin diameter (or maximum diagonal for square/rectangular pins) and the nominal finished hole size, then verify that worst-case minimum hole minus maximum pin still leaves $\\ge 0.10\\text{--}0.12\\text{ mm}$ clearance. Always check the component datasheet first.","For standard round through-hole leads soldered by wave, selective, or hand soldering, designers commonly target a diametral clearance of $0.15\\text{ mm}$ to $0.30\\text{ mm}$ ($6\\text{--}12\\text{ mil}$) between the maximum pin diameter (or maximum diagonal for square/rectangular pins) and the nominal finished hole size, then verify that worst-case minimum hole minus maximum pin still leaves $\\ge 0.10\\text{--}0.12\\text{ mm}$ clearance. Always check the component datasheet first.",{"question":23,"answer":24,"answerText":24},"Why does HASL surface finish require a different hole tolerance or drill compensation than ENIG?","Electroless Nickel Immersion Gold (ENIG) deposits a thin, uniform chemical layer ($\\approx 3\\text{--}6\\ \\mu\\text{m}$ Ni plus $\u003C0.1\\ \\mu\\text{m}$ Au per wall), preserving a cylindrical bore. Hot Air Solder Leveling (HASL) dips the board in molten solder and clears holes with hot air knives, leaving a thicker, slightly barrel-shaped solder coating ($10\\text{--}40\\ \\mu\\text{m}$) that narrows the effective finished opening and generally requires wider FHS tolerances (e.g., $\\pm 0.08\\text{ mm}$ vs. $\\pm 0.05\\text{ mm}$ for ENIG) or a larger starting drill bit.",{"question":26,"answer":27,"answerText":27},"Can I shrink a component hole diameter in CAM just to fix an inner-layer annular ring violation?","Never reduce a component PTH's finished hole diameter to gain annular ring margin without first recalculating the worst-case pin-to-hole clearance against the component's maximum lead diameter or diagonal. If the hole cannot be shrunk without binding the component lead, enlarge the pad (or add teardrops) and verify adjacent trace clearance instead.",[29,30,31,32],"finished hole size","PCB drill size","hole tolerance","press-fit PCB","pcb-finished-hole-size-drill-tolerance","en",[34,36,37,38,39],"de","cn","fr","ru",{"blog":41,"breadcrumb":50},{"@context":42,"@type":43,"headline":4,"description":5,"image":8,"url":44,"datePublished":6,"dateModified":6,"timeRequired":11,"keywords":45,"articleSection":7,"author":46,"publisher":49},"https://schema.org","BlogPosting","https://hilpcb.com/it/blog/pcb-finished-hole-size-drill-tolerance/","finished hole size, PCB drill size, hole tolerance, press-fit PCB",{"@type":47,"name":48},"Organization","HILPCB",{"@type":47,"name":48},{"@context":42,"@type":51,"itemListElement":52},"BreadcrumbList",[53,58,62],{"@type":54,"position":55,"name":56,"item":57},"ListItem",1,"Home","https://hilpcb.com/",{"@type":54,"position":59,"name":60,"item":61},2,"Blog","https://hilpcb.com/it/blog/",{"@type":54,"position":63,"name":33,"item":44},3,1793497495401]