A PCB trace width calculator calculates the minimum cross-sectional area and conductor width required to safely carry a target electrical current without exceeding a defined temperature rise. When electric current flows through a printed copper trace, electrical resistance generates Joule heating ($I^2R$). Because excessive heat degrades dielectric laminates, delaminates copper foil, and induces thermal drift in nearby components, sizing power and ground traces to verified industry standards—principally IPC-2152 and IPC-2221—is an essential step in every board layout.
Whether you search for a trace width calculator for pcb, a pcb trace current calculator, or a practical pcb trace size calculator, this guide provides the underlying IPC formulas, an engineering lookup table for external and internal layers, step-by-step worked calculations, and clear criteria for when a design must transition from standard routing to heavy copper.
What Is a PCB Trace Width Calculator?
A trace width calculator is a sizing tool that translates electrical and thermal design requirements into physical PCB routing dimensions. Unlike signal traces—where width is governed primarily by controlled characteristic impedance ($Z_0$, calculated using an impedance calculator)—power rails, motor drives, battery circuits, and converter outputs are governed by current-carrying capacity and thermal equilibrium.
Thermal equilibrium is reached when the rate of resistive heat generation matches the rate of heat dissipation to the surrounding air, the dielectric substrate, and adjacent copper planes. A reliable pcb width trace calculator evaluates four primary variables:
- Target Continuous Current ($I$): The root-mean-square (RMS) or continuous DC current in amperes.
- Allowable Temperature Rise ($\Delta T$): The permissible conductor temperature increase above ambient operating temperature (typically 10°C to 20°C for commercial and industrial electronics).
- Copper Foil Thickness ($T$): The finished copper weight, commonly 0.5 oz (18 µm), 1 oz (35 µm), or 2 oz (70 µm).
- Layer Boundary Condition: Whether the conductor is on an external surface layer (where convection and radiation shed heat efficiently) or embedded on an internal layer (where thermal conductivity is constrained by the dielectric prepreg and core).
How Do You Calculate PCB Trace Width? (IPC-2152 vs IPC-2221 Standards)
Historically, PCB designers relied exclusively on IPC-2221 (derived from legacy charts in IPC-D-275 dating back to the 1950s). In 2009, the industry introduced IPC-2152 (Standard for Determining Current-Carrying Capacity in Printed Board Design), which established an empirically measured thermal database accounting for modern multi-layer constructions, board thickness, and copper plane thermal coupling.
The Classical IPC-2221 Calculation Formula
The classical IPC-2221 formula calculates the required conductor cross-sectional area ($A$) in square mils ($ ext{mil}^2$):
$$A = \left( rac{I}{k \cdot \Delta T^b} ight)^{ rac{1}{c}}$$
Where the empirical constants are defined as:
- For External Layers: $k = 0.048$, $b = 0.44$, $c = 0.725$
- For Internal Layers: $k = 0.024$, $b = 0.44$, $c = 0.725$
Once cross-sectional area $A$ is determined, the minimum trace width ($W$) in mils is calculated from the copper thickness ($T$, where 1 oz copper $pprox 1.378 ext{ mil}$):
$$W = rac{A}{T \cdot 1.378}$$
Because $k$ for internal layers is half that of external layers ($0.024$ vs $0.048$), an internal trace requires roughly double the cross-sectional area of an external trace to carry the identical current at the same allowable temperature rise.
How IPC-2152 Improves on IPC-2221
IPC-2221 assumes an isolated conductor in still air on a standard 1.6 mm board with no adjacent copper planes, making its predictions conservative for boards with internal ground planes and overly optimistic for thin uncoupled boards. IPC-2152 incorporates:
- Thermal spreading of internal copper planes: A nearby ground plane absorbs trace heat, effectively reducing required trace width by 15% to 30%.
- Board thickness effects: Thicker laminate substrates act as a thermal heatsink.
- Environmental conditions: Explicitly separating vacuum, still air, and forced convection environments.
Trace Width vs Current: External and Internal Layer Reference Table
The lookup table below outlines minimum trace widths calculated per IPC standards for standard temperature rises ($\Delta T = 10^\circ ext{C}$ and $20^\circ ext{C}$) on 1 oz (35 µm) and 2 oz (70 µm) copper:
| Current (A) | Layer Type | Copper Weight | Width for $\Delta T = 10^\circ ext{C}$ (mil / mm) | Width for $\Delta T = 20^\circ ext{C}$ (mil / mm) | Resistance ($m\Omega/ ext{cm}$) | Voltage Drop / 10 cm |
|---|---|---|---|---|---|---|
| 1.0 A | External | 1 oz (35 µm) | 11.8 mil (0.30 mm) | 7.4 mil (0.19 mm) | 16.3 $m\Omega$ | 0.016 V |
| 1.0 A | Internal | 1 oz (35 µm) | 30.6 mil (0.78 mm) | 19.1 mil (0.49 mm) | 6.3 $m\Omega$ | 0.006 V |
| 2.0 A | External | 1 oz (35 µm) | 30.6 mil (0.78 mm) | 19.1 mil (0.49 mm) | 6.3 $m\Omega$ | 0.013 V |
| 2.0 A | Internal | 1 oz (35 µm) | 79.5 mil (2.02 mm) | 49.7 mil (1.26 mm) | 2.4 $m\Omega$ | 0.005 V |
| 3.0 A | External | 1 oz (35 µm) | 52.8 mil (1.34 mm) | 33.0 mil (0.84 mm) | 3.6 $m\Omega$ | 0.011 V |
| 3.0 A | External | 2 oz (70 µm) | 26.4 mil (0.67 mm) | 16.5 mil (0.42 mm) | 3.6 $m\Omega$ | 0.011 V |
| 5.0 A | External | 1 oz (35 µm) | 104.6 mil (2.66 mm) | 65.4 mil (1.66 mm) | 1.8 $m\Omega$ | 0.009 V |
| 5.0 A | External | 2 oz (70 µm) | 52.3 mil (1.33 mm) | 32.7 mil (0.83 mm) | 1.8 $m\Omega$ | 0.009 V |
| 5.0 A | Internal | 2 oz (70 µm) | 136.0 mil (3.45 mm) | 85.0 mil (2.16 mm) | 0.7 $m\Omega$ | 0.004 V |
| 10.0 A | External | 2 oz (70 µm) | 136.1 mil (3.46 mm) | 85.1 mil (2.16 mm) | 0.7 $m\Omega$ | 0.007 V |
| 10.0 A | Internal | 2 oz (70 µm) | 353.9 mil (8.99 mm) | 221.2 mil (5.62 mm) | 0.3 $m\Omega$ | 0.003 V |
Worked Engineering Examples
Example 1: 1.5 A Sensor Rail on 1 oz External Layer
- Input Parameters: $I = 1.5 ext{ A}$, $\Delta T = 10^\circ ext{C}$, $T = 1 ext{ oz}$ ($1.378 ext{ mil}$), External layer ($k = 0.048$).
- Calculation: $$A = \left( rac{1.5}{0.048 \cdot 10^{0.44}} ight)^{ rac{1}{0.725}} = \left( rac{1.5}{0.132} ight)^{1.379} = 11.36^{1.379} pprox 28.9 ext{ mil}^2$$ $$W = rac{28.9}{1.378} pprox 20.97 ext{ mil} pprox 0.53 ext{ mm}$$
- Design Decision: Route with a standard 22 mil or 25 mil trace width to provide comfortable manufacturing tolerance.
Example 2: 5 A DC-DC Converter Output on 2 oz Internal Layer
- Input Parameters: $I = 5.0 ext{ A}$, $\Delta T = 20^\circ ext{C}$, $T = 2 ext{ oz}$ ($2.756 ext{ mil}$), Internal layer ($k = 0.024$).
- Calculation: $$A = \left( rac{5.0}{0.024 \cdot 20^{0.44}} ight)^{ rac{1}{0.725}} = \left( rac{5.0}{0.090} ight)^{1.379} = 55.5^{1.379} pprox 234.3 ext{ mil}^2$$ $$W = rac{234.3}{2.756} pprox 85.0 ext{ mil} pprox 2.16 ext{ mm}$$
- Design Decision: Routing an 85 mil (2.16 mm) trace on an inner layer consumes significant routing channels. In practice, replace discrete traces with a dedicated polygon pour or split the current across parallel layers stitched with thermal vias.
Common Trace Width Sizing Mistakes to Avoid
- Treating Internal and External Layers Equivalently: Applying external current charts to internal layers results in conductors running 30°C to 50°C hotter than anticipated, risking localized laminate delamination.
- Ignoring Etch Factor and Copper Thickness Tolerances: Standard 1 oz foil typically measures 30 µm to 33 µm after plating and chemical cleaning, and chemical etching introduces trapezoidal undercut. Add at least a 10% to 15% width margin over theoretical calculations.
- Overlooking DC Resistance and Voltage Drop: A trace may operate safely within thermal limits while dropping excessive voltage along a 20 cm run. Always calculate $V_{ ext{drop}} = I \cdot R$ to ensure power rail regulation remains within IC tolerances.
- Paralleling Traces Without Proper Thermal Stitching: Routing parallel conductors across top and bottom layers without stitching vias causes unequal current sharing if via impedances differ.
When to Transition to Heavy Copper and Busbars
When a calculated trace width exceeds 150 to 200 mils (3.8 mm to 5.0 mm), discrete surface traces become impractical. Consider these manufacturing alternatives:
- Heavy Copper PCBs (3 oz to 10 oz): Thick copper conductors allow high current densities within manageable track widths, as outlined in our thick copper PCB overview and heavy copper manufacturing service.
- Embedded Copper Busbars: Solder-bonded copper busbars or press-fit bus elements carry currents above 50 A directly on the board.
- Top and Bottom Polygon Pours: Pouring solid copper planes on multiple layers connected by dense via arrays.
For complete layout and DFM guidance, see our circuit board design guide and IPC-2221 design standard overview.
Frequently Asked Questions (FAQ)
How wide should a PCB trace be for 1A?
For 1A of current on a standard 1 oz external layer with an allowable temperature rise of 10°C, the minimum recommended trace width is approximately 12 mil (0.3 mm). On an internal layer, the width should be increased to approximately 30 mil (0.78 mm).
What is the difference between IPC-2152 and IPC-2221 for trace width?
IPC-2221 relies on legacy charts of isolated traces in air, yielding conservative values. IPC-2152 is based on empirical thermal measurements that account for board thickness, heat dissipation through adjacent copper ground planes, and air versus vacuum environments.
Does copper thickness change required trace width?
Yes. Trace current capacity is governed by cross-sectional area (thickness × width). Increasing copper weight from 1 oz (35 µm) to 2 oz (70 µm) halves the trace width needed to carry the same current at the same temperature rise.
Can the same trace carry power and signal?
Power traces require substantial width for low DC resistance and thermal control, whereas high-speed signal traces require precise narrow geometries to maintain 50Ω or 100Ω impedance. Power and signal routing must be kept separate.
What is a PCB trace size calculator?
A PCB trace size calculator is an engineering tool that uses thermal standards (IPC-2152 / IPC-2221) to determine the exact conductor width and copper weight required for a given current load and board layer stackup.
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